Hello Chin,
I've posted my feedback. I hope it is helpful for you. http://patchwork.ozlabs.org/patch/327943/
Great, I will patch them. From the patch, I saw your DMA sequence code and the discrepancy. For the data portion, I spotted you set the bit 31:16. But inside my datasheet, its marked as reserved.
Wonder the version of Denali controller I have is older? Probably we can probe the Cadence then. At same time, I will send out new patch to capture the fix before forget.
Yes, please.
I am interested in this mystery. I really suspect there are some incompatible versions in Denali IP.
I sent a question about this to Cadence. They did not admit it. (But I doubt it.)
By the way, Panasonic have been using Denali NAND controller IP since 2010. I refer to "Denali NAND Flash Memory Controller User's Guide" issued on Nov. 30, 2010. Unfortunately, I can not share it because it is marked as "confidential".
Best Regards Masahiro Yamada.