
From: Jerry Huang Chang-Ming.Huang@freescale.com
Signed-off-by: Jerry Huang Chang-Ming.Huang@freescale.com Signed-off-by: Zhao Chenhui b35336@freescale.com Signed-off-by: Kumar Gala galak@kernel.crashing.org --- boards.cfg | 1 + include/configs/P2020DS.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/boards.cfg b/boards.cfg index be5f83d..39f15f6 100644 --- a/boards.cfg +++ b/boards.cfg @@ -537,6 +537,7 @@ P2020DS powerpc mpc85xx p2020ds freesca P2020DS_36BIT powerpc mpc85xx p2020ds freescale - P2020DS:36BIT P2020DS_DDR2 powerpc mpc85xx p2020ds freescale - P2020DS:DDR2 P2020DS_SDCARD powerpc mpc85xx p2020ds freescale - P2020DS:SDCARD +P2020DS_SPIFLASH powerpc mpc85xx p2020ds freescale - P2020DS:SPIFLASH P2020RDB powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB P2020RDB_36BIT powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT P2020RDB_36BIT_SDCARD powerpc mpc85xx p1_p2_rdb freescale - P1_P2_RDB:P2020RDB,36BIT,SDCARD diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 47f1f18..cee9fd4 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -40,6 +40,13 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc #endif
+#ifdef CONFIG_SPIFLASH +#define CONFIG_SYS_RAMBOOT +#define CONFIG_SYS_EXTRA_ENV_RELOC +#define CONFIG_SYS_TEXT_BASE 0xf8f80000 +#define CONFIG_RESET_VECTOR_ADDRESS 0xf8fffffc +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -418,6 +425,18 @@ #define CONFIG_SYS_EEPROM_BUS_NUM 0
/* + * eSPI - Enhanced SPI + */ +#define CONFIG_FSL_ESPI + +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION + +#define CONFIG_CMD_SF +#define CONFIG_SF_DEFAULT_SPEED 10000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 + +/* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ @@ -594,6 +613,15 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 +#elif defined(CONFIG_SPIFLASH) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 10000000 +#define CONFIG_ENV_SPI_MODE 0 +#define CONFIG_ENV_SIZE 0x2000 /* 8KB */ +#define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ +#define CONFIG_ENV_SECT_SIZE 0x10000 #else #define CONFIG_ENV_IS_IN_FLASH 1 #if CONFIG_SYS_MONITOR_BASE > 0xfff80000