If card and host are supported DDR mode, then it can be used the DDR mode. This patch-set has dependency about beomho's patch-set. (Based-on u-boot-samsung repository)
http://patchwork.ozlabs.org/patch/331986/ http://patchwork.ozlabs.org/patch/331987/ http://patchwork.ozlabs.org/patch/331989/ http://patchwork.ozlabs.org/patch/331988/
It's result for loading image.
sdhci controller ->5260488 bytes read in 259 ms (19.4 MiB/s) dwmmc controller without DDR mode -> 5260488 bytes read in 202 ms (24.8 MiB/s) dwmmc controller with DDR mode -> 5260488 bytes read in 118 ms (42.5 MiB/s)
Download the 400M image with lthor. sdhci controller -> 59.4sec (Avg 6.95 MB/s) dwmmc controller without DDR mode -> 61.6sec (Avg 6.72MB/s) dwmmc controller with DDR mode -> 60.4sec (Avg 6.85MB/s)
Jaehoon Chung (10): mmc: s5p_sdhci: add the s5p_sdhci_core_init function ARM: exynos: board: change the mmc/sd init sequence ARM: exynos: clock: modify the set_mmc_clk for exynos4 mmc: exynos_dw_mmc: restore the property into host mmc: remove the unnecessary define and fix the wrong bit control mmc: support the DDR mode for eMMC mmc: dw_mmc: support the DDR mode ARM: dts: exnyos: enable dw-mmc controller mmc: exynos_dw_mmc: enable the DDR mode ARM: exynos4: enable the dwmmc configuration
arch/arm/cpu/armv7/exynos/clock.c | 16 ++- arch/arm/dts/exynos4412-trats2.dts | 6 +- arch/arm/include/asm/arch-exynos/clk.h | 5 + board/samsung/common/board.c | 13 +- drivers/mmc/dw_mmc.c | 10 +- drivers/mmc/exynos_dw_mmc.c | 221 ++++++++++++++++++++------------ drivers/mmc/mmc.c | 16 ++- drivers/mmc/s5p_sdhci.c | 42 +++--- include/configs/exynos4-dt.h | 3 + include/dwmmc.h | 5 + include/mmc.h | 25 ++-- 11 files changed, 225 insertions(+), 137 deletions(-)