Hi Yann,
On Thu, 05 Jul 2012 17:19:00 +0200, "Andreas Bießmann" andreas.devel@googlemail.com wrote:
Dear Yann Vernier,
On 05.07.2012 15:22, Yann Vernier wrote:
Changed CONFIG_SYS_TEXT_BASE to actual address (required for board_init_f) and moved it into cm4008.h, along with a warning that it must match CONFIG_SYS_FLASH_BASE (since lowlevel_init relocates there). lowlevel_init now uses CONFIG_SYS_FLASH_BASE to map ROM, although the second bank is still mapped at 0x02400000-0x027fffff.
Changes for v2:
- Update to use CONFIG_SYS_FLASH_ constants only (no PHYS_FLASH)
- Use tabs where appropriate
- Update cm41xx also
- Explain the lowlevel_init change
Signed-off-by: Yann Vernier yann.vernier@orsoc.se
arch/arm/cpu/arm920t/ks8695/lowlevel_init.S | 9 +++++++-- board/cm4008/config.mk | 1 - board/cm41xx/config.mk | 1 - include/configs/cm4008.h | 7 ++++--- include/configs/cm41xx.h | 7 ++++--- 5 files changed, 15 insertions(+), 10 deletions(-) delete mode 100644 board/cm4008/config.mk delete mode 100644 board/cm41xx/config.mk
diff --git a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S index df13de6..7bb9ede 100644 --- a/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S +++ b/arch/arm/cpu/arm920t/ks8695/lowlevel_init.S @@ -92,11 +92,16 @@ lowlevel_init: * ram from address 0, and flash at 32MB. */ ldr r1, =(KS8695_IO_BASE+KS8695_MEM_CTRL0)
- /* Remap flash memory to 768MB size, such that it covers
both 0 (boot) and 512MB (run) regions */
- ldr pc, =(highflash+0x02000000-0x00f00000) /* jump to high flash address */
- /* Relies on CONFIG_SYS_FLASH_BASE==CONFIG_SYS_TEXT_BASE */
- ldr pc, =(highflash) /* jump to high flash address */
highflash:
- ldr r2, =0x8fe00040
- /* Move ROM to high address, and reconfigure to 4MiB size */
- ldr r2, =(((CONFIG_SYS_FLASH_BASE+0x3f0000)<<(22-16))| \
(CONFIG_SYS_FLASH_BASE>>(16-12))|0x40)again some magic ... Well I do not know this architecture in detail and can nothing say about the register footprint. I just hope somebody with access to tech spec of this cpu is able to understand how 'Move ROM to high address, and reconfigure to 4MiB size' is related to this magic.
Beside that I tend to ack this patch. Yann, have you some proposal to resolve my doubts?
Did not hear any answer to this. Do we get a V3 for this patch?
Or should I assume that the pversions to pick are V2 for 1/3 and 2/3, and V3 for 3/3?
Amicalement,