On Fri, Apr 15, 2022 at 8:11 AM Gaurav Jain gaurav.jain@nxp.com wrote:
RNG Hardware error is reported due to incorrect entropy delay
Yes, I observe the RNG hardware error in the kernel too.
rng self test are run to determine the correct ent_dly. test is executed with different voltage and temperature to identify the worst case value for ent_dly. after adding a margin value(1000), ent_dly should be at least 12000.
Signed-off-by: Gaurav Jain gaurav.jain@nxp.com
drivers/crypto/fsl/jr.c | 11 ++++++++++- include/fsl_sec.h | 6 +++++- 2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index 1d951cf0a6..85a3dac796 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -623,7 +623,7 @@ static void kick_trng(int ent_delay, ccsr_sec_t *sec)
static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) {
int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
int ret, gen_sk, ent_delay = RTSDCTL_ENT_DLY; struct rng4tst __iomem *rng = (struct rng4tst __iomem *)&sec->rng; u32 inst_handles;@@ -652,6 +652,15 @@ static int rng_init(uint8_t sec_idx, ccsr_sec_t *sec) * the RNG. */ ret = instantiate_rng(sec_idx, sec, gen_sk);
/** entropy delay is calculated via self-test method.* self-test are run across different volatge, temp.
s/volatge/voltage
Reviewed-by: Fabio Estevam festevam@denx.de