Hi Albert,
I got it, thanks your explaination.
2011/3/20 Albert ARIBAUD albert.aribaud@free.fr:
Le 03/20/11 06:36, arden jay a écrit :
Hi Michael,
I still have question. :)
When ARM fetch instruction, it firstly try cache. It then should have cache miss, and forces to reload the instruction from memory? Why it will have problem while U-boot& Kernel at the same memory location?
The error in your assumption is the "it then should have cache miss". A cache won't have a cache miss if it has already been fetched and not yet been invalidated, and the i-cache won't magically invalidate just because you do data writes at the location where the i-cache was fetched from; you end up with an i-cache that pretends to be valid but no longer matches the main memory content.
Amicalement,
Albert.