Hi,
On 24/05/19 10:01, Michal Simek wrote:
On 23. 05. 19 15:54, Luca Ceresoli wrote:
Hi,
On 22/05/19 12:24, Michal Simek wrote:
On 10. 05. 19 10:15, Luca Ceresoli wrote:
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the only publicly-available compatible carrier card. The SoM is based on the EV version of the Xilinx ZynqMP SoC+FPGA.
The psu_init_gpl.c file has been generated from the board definition files at [0] using Vivado 2018.3. It has then minimized by tools/zynqmp_psu_init_minimize.sh and slightly fixed manually.
[0] https://github.com/Avnet/bdf/tree/3686c9ff7d2f0467fb4fcf39f861b8d6ff183b12/u...
Signed-off-by: Luca Ceresoli luca@lucaceresoli.net
Whole patchset tested on:
- current u-boot/master, as is
- current u-boot-microblaze/master
- current u-boot-microblaze/master with the addtion of commit f89d6133eef2 ("configs: move CONFIG_SPL_TEXT_BASE to Kconfig")
[...]
diff --git a/arch/arm/dts/avnet-ultrazedev.dts b/arch/arm/dts/avnet-ultrazedev.dts new file mode 100644 index 000000000000..34d506a28e88 --- /dev/null +++ b/arch/arm/dts/avnet-ultrazedev.dts
[...]
+/* I2C peripherals on carrier card */
This is the biggest issue I have with this patch. It is SOM which should be described in separate file and then we have carried board. That's why please separate DTS file.
Absolutely! Will do.
+&i2c_cc {
- /* Microchip 24AA025E48T-I/OT: 2K I2C Serial EEPROMs with EUI-48 */
- eeprom: eeprom@51 {
compatible = "at,24c02", "i2c-eeprom";reg = <0x51>;- };
- /* Versa Clock 5P49V5935B */
- vc5: clock-generator@6a {
compatible = "idt,5p49v5935";reg = <0x6a>;#clock-cells = <1>;- };
+};
+/* Ethernet:
- Marvell 88E1512-A0-NNP2I000 PHY on SOM
- RJ-45 on Carrier Card
- */
This is interesting.
+&gem3 {
- status = "okay";
- phy-mode = "rgmii-id";
+};
Well, the phy-mode is related to the MAC-PHY link, while the existence of a connector is carrier-dependent. So I think the right thing to do here is:
In the SOM dtsi:
&gem3 { phy-mode = "rgmii-id"; };
and in the carrier dts:
&gem3 { status = "okay"; };
Does it look OK?
I have looked at schematics and SOM dt should have phy-mode , phy address + phy flags if any. And yes - you can enable status if there is connector on carrier board.
Ok.
Anyway I forget to mentioned one thing. Are you willing to test this board and keep it updated? I don't want to end up in situation where I am with microzed and picozed which I am not able to test myself.
I have access to the board on my workplace and I'm OK with testing it at least once per U-Boot release, and when needed for e.g. changes that impact multiple boards.