Add folks familiar with DSPI.
On 11/18/2015 09:41 PM, Aneesh Bansal wrote:
LS1043ARDB Secure Boot Target from NOR has been added.
- Configs defined to enable esbc_validate.
- ESBC Address in header is made 64 bit.
- SMMU is re-configured in Bypass mode.
Signed-off-by: Aneesh Bansal aneesh.bansal@freescale.com
Changes in v2: New Patch Set created with an additional patch. Pointers typecasted to uintptr_t to remove compiler warnings
arch/arm/include/asm/arch-fsl-layerscape/config.h | 16 ++++++++-- .../include/asm/arch-fsl-layerscape/immap_lsch2.h | 2 +- board/freescale/common/fsl_validate.c | 35 +++++++++++++--------- board/freescale/ls1043ardb/MAINTAINERS | 5 ++++ board/freescale/ls1043ardb/ls1043ardb.c | 18 ++++++++++- common/cmd_blob.c | 6 ++-- configs/ls1043ardb_SECURE_BOOT_defconfig | 4 +++ include/configs/ls1043ardb.h | 12 ++++++++ include/fsl_validate.h | 9 +++++- 9 files changed, 85 insertions(+), 22 deletions(-) create mode 100644 configs/ls1043ardb_SECURE_BOOT_defconfig
I know a recent change requires CONFIG_SYS_NS16550=y. I am not sure if DSPI can/should be enabled. Let's wait for Alison/Prabhakar's comment on DSPI.
Alison/Prabhakar, DSPI support is enabled using DM for QDS and RDB for NOR boot. Do we want to enable DSPI for nand boot, and secure boot?
<snip>
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 307d947..bf3a1a0 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -268,4 +268,16 @@ #define CONFIG_ETHPRIME "FM1@DTSEC3" #endif
+#ifdef CONFIG_SECURE_BOOT +/* Hash command with SHA acceleration supported in hardware */ +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL +#define CONFIG_CMD_BLOB
+/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */ +#define CONFIG_ESBC_ADDR_64BIT
+#include <asm/fsl_secure_boot.h> +#endif
Do you want to put this include inside ifdef? You have both ways in different header files.
York