This patch removes CONFIG_SYS_DSPI_XX options from include/configs "m68k" .h board files, since CTAR registers are now set with default values in the cf_spi driver initialization, and configurable by devicetree.
Note, these options cannot be totally removed from the whitelist, since still used from boards using fsl_dspi.c (mostly arm-based boards).
Reviewed-by: Simon Glass sjg@chromium.org Signed-off-by: Angelo Dureghello angelo@sysam.it --- Changes for v2: - new patch Changes for v3: - none Changes for v4: - none --- include/configs/M52277EVB.h | 11 ----------- include/configs/M54418TWR.h | 12 ------------ include/configs/M54451EVB.h | 12 ------------ include/configs/M54455EVB.h | 10 ---------- include/configs/stmark2.h | 11 ----------- 5 files changed, 56 deletions(-)
diff --git a/include/configs/M52277EVB.h b/include/configs/M52277EVB.h index 83d774527a..b0e9a0f526 100644 --- a/include/configs/M52277EVB.h +++ b/include/configs/M52277EVB.h @@ -103,17 +103,6 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI #define CONFIG_SYS_SBFHDR_SIZE 0x7 -#ifdef CONFIG_CMD_SPI -# define CONFIG_SYS_DSPI_CS2 - -# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ - DSPI_CTAR_PCSSCK_1CLK | \ - DSPI_CTAR_PASC(0) | \ - DSPI_CTAR_PDT(0) | \ - DSPI_CTAR_CSSCK(0) | \ - DSPI_CTAR_ASC(0) | \ - DSPI_CTAR_DT(1)) -#endif
/* Input, PCI, Flexbus, and VCO */ #define CONFIG_EXTRA_CLOCK diff --git a/include/configs/M54418TWR.h b/include/configs/M54418TWR.h index 4b8ef38c0b..1426492c23 100644 --- a/include/configs/M54418TWR.h +++ b/include/configs/M54418TWR.h @@ -152,18 +152,6 @@ #define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH #define CONFIG_SYS_SBFHDR_SIZE 0x7 -#ifdef CONFIG_CMD_SPI - -# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ - DSPI_CTAR_PCSSCK_1CLK | \ - DSPI_CTAR_PASC(0) | \ - DSPI_CTAR_PDT(0) | \ - DSPI_CTAR_CSSCK(0) | \ - DSPI_CTAR_ASC(0) | \ - DSPI_CTAR_DT(1)) -# define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0) -# define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0) -#endif
/* Input, PCI, Flexbus, and VCO */ #define CONFIG_EXTRA_CLOCK diff --git a/include/configs/M54451EVB.h b/include/configs/M54451EVB.h index 87cdbae1db..44fd8072fc 100644 --- a/include/configs/M54451EVB.h +++ b/include/configs/M54451EVB.h @@ -117,18 +117,6 @@ #define CONFIG_CF_DSPI #define CONFIG_SERIAL_FLASH #define CONFIG_SYS_SBFHDR_SIZE 0x7 -#ifdef CONFIG_CMD_SPI - -# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ - DSPI_CTAR_PCSSCK_1CLK | \ - DSPI_CTAR_PASC(0) | \ - DSPI_CTAR_PDT(0) | \ - DSPI_CTAR_CSSCK(0) | \ - DSPI_CTAR_ASC(0) | \ - DSPI_CTAR_DT(1)) -# define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0) -# define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0) -#endif
/* Input, PCI, Flexbus, and VCO */ #define CONFIG_EXTRA_CLOCK diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index d41b7c4492..ea97188fe8 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -143,16 +143,6 @@ /* DSPI and Serial Flash */ #define CONFIG_CF_DSPI #define CONFIG_SYS_SBFHDR_SIZE 0x13 -#ifdef CONFIG_CMD_SPI - -# define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ - DSPI_CTAR_PCSSCK_1CLK | \ - DSPI_CTAR_PASC(0) | \ - DSPI_CTAR_PDT(0) | \ - DSPI_CTAR_CSSCK(0) | \ - DSPI_CTAR_ASC(0) | \ - DSPI_CTAR_DT(1)) -#endif
/* PCI */ #ifdef CONFIG_CMD_PCI diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index f49e79c824..d16ed8f253 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -78,17 +78,6 @@
#define CONFIG_SYS_SBFHDR_SIZE 0x7
-#define CONFIG_SYS_DSPI_CTAR0 (DSPI_CTAR_TRSZ(7) | \ - DSPI_CTAR_PCSSCK_1CLK | \ - DSPI_CTAR_PASC(0) | \ - DSPI_CTAR_PDT(0) | \ - DSPI_CTAR_CSSCK(0) | \ - DSPI_CTAR_ASC(0) | \ - DSPI_CTAR_DT(1) | \ - DSPI_CTAR_BR(6)) -#define CONFIG_SYS_DSPI_CTAR1 (CONFIG_SYS_DSPI_CTAR0) -#define CONFIG_SYS_DSPI_CTAR2 (CONFIG_SYS_DSPI_CTAR0) - /* Input, PCI, Flexbus, and VCO */ #define CONFIG_EXTRA_CLOCK