When changing the column, the ONFI specification states that a minimum time of tCCS (Change Column Setup time) must elapse between the last address cycle is asserted on the bus and the first data cycle is clocked. An usual value for average NANDs is 500 nanoseconds. Round it up to 1 microsecond to be safe.
Signed-off-by: Miquel Raynal miquel.raynal@bootlin.com --- drivers/mtd/nand/sunxi_nand_spl.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand_spl.c b/drivers/mtd/nand/sunxi_nand_spl.c index 25a0941fd2..2fa1f70d9d 100644 --- a/drivers/mtd/nand/sunxi_nand_spl.c +++ b/drivers/mtd/nand/sunxi_nand_spl.c @@ -243,15 +243,22 @@ static int nand_load_page(const struct nfc_config *conf, u32 offs)
static int nand_reset_column(void) { + int ret; + writel((NFC_CMD_RNDOUTSTART << NFC_RANDOM_READ_CMD1_OFFSET) | (NFC_CMD_RNDOUT << NFC_RANDOM_READ_CMD0_OFFSET) | (NFC_CMD_RNDOUTSTART << NFC_READ_CMD_OFFSET), SUNXI_NFC_BASE + NFC_RCMD_SET); writel(0, SUNXI_NFC_BASE + NFC_ADDR_LOW);
- return nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | - (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | - NFC_CMD_RNDOUT); + ret = nand_exec_cmd(NFC_SEND_CMD1 | NFC_SEND_CMD2 | NFC_RAW_CMD | + (1 << NFC_ADDR_NUM_OFFSET) | NFC_SEND_ADDR | + NFC_CMD_RNDOUT); + + /* Ensure tCCS has passed before reading data */ + udelay(1); + + return ret; }
static int nand_read_page(const struct nfc_config *conf, u32 offs,