Signed-off-by: Ashish Kumar Ashish.Kumar@nxp.com Signed-off-by: Amrita Kumari amrita.kumari@nxp.com Signed-off-by: Ran Wang ran.wang_1@nxp.com --- Change in v3: 1.Move HAS_FSL_XHCI_USB and USB_XHCI_FSL define to other patch file.
Change in v2: 1.Adjust USB nodes position in dts to keep them sorted in unit-address. 2.Move macro CONFIG_HAS_FSL_XHCI_USB and CONFIG_USB_XHCI_FSL to Kconfig option. 3.Remove CONFIG_USB_MAX_CONTROLLER_COUNT.
Change in v1: Rebased to ba39608 ARM: DRA72x: Add support for detection of DRA71x SR 2.1
arch/arm/dts/fsl-ls1088a.dtsi | 14 ++++++++++++++ configs/ls1088ardb_qspi_defconfig | 8 ++++++++ include/linux/usb/xhci-fsl.h | 2 +- 3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi index d943a9efa3..64b4fcf12b 100644 --- a/arch/arm/dts/fsl-ls1088a.dtsi +++ b/arch/arm/dts/fsl-ls1088a.dtsi @@ -76,6 +76,20 @@ num-cs = <4>; };
+ usb0: usb3@3100000 { + compatible = "fsl,layerscape-dwc3"; + reg = <0x0 0x3100000 0x0 0x10000>; + interrupts = <0 80 0x4>; /* Level high type */ + dr_mode = "host"; + }; + + usb1: usb3@3110000 { + compatible = "fsl,layerscape-dwc3"; + reg = <0x0 0x3110000 0x0 0x10000>; + interrupts = <0 81 0x4>; /* Level high type */ + dr_mode = "host"; + }; + pcie@3400000 { compatible = "fsl,ls-pcie", "snps,dw-pcie"; reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */ diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index 2d5a134261..3034f506e2 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -31,3 +31,11 @@ CONFIG_FSL_DSPI=y CONFIG_EFI_LOADER_BOUNCE_BUFFER=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_FSL_LS_PPA=y +CONFIG_USB=y +CONFIG_USB_GADGET=y +CONFIG_CMD_USB=y +CONFIG_DM_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3=y +CONFIG_USB_STORAGE=y diff --git a/include/linux/usb/xhci-fsl.h b/include/linux/usb/xhci-fsl.h index bd54089722..a916afb885 100644 --- a/include/linux/usb/xhci-fsl.h +++ b/include/linux/usb/xhci-fsl.h @@ -58,7 +58,7 @@ struct fsl_xhci { #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR 0 #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0 -#elif defined(CONFIG_ARCH_LS2080A) +#elif defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A) #define CONFIG_SYS_FSL_XHCI_USB1_ADDR CONFIG_SYS_XHCI_USB1_ADDR #define CONFIG_SYS_FSL_XHCI_USB2_ADDR CONFIG_SYS_XHCI_USB2_ADDR #define CONFIG_SYS_FSL_XHCI_USB3_ADDR 0