On Wed, 29 Mar 2023 at 05:12, Abdellatif El Khlifi abdellatif.elkhlifi@arm.com wrote:

add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17. Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

Signed-off-by: Abdellatif El Khlifi abdellatif.elkhlifi@arm.com Reviewed-by: Jens Wiklander jens.wiklander@linaro.org Cc: Tom Rini trini@konsulko.com Cc: Simon Glass sjg@chromium.org Cc: Ilias Apalodimas ilias.apalodimas@linaro.org

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Changelog:

v9:

• update the copyright string

v7:

• improve indentation of ARM_SMCCC_1_2_REGS_Xn_OFFS

v4:

• rename the commit title and improve description new commit title: the current

v3:

• port x0-x17 registers support from linux kernel as defined by SMCCCv1.2 commit title: arm64: smccc: add Xn registers support used by SMC calls

arch/arm/cpu/armv8/smccc-call.S | 57 ++++++++++++++++++++++++++++++++- arch/arm/lib/asm-offsets.c | 16 +++++++++ include/linux/arm-smccc.h | 45 ++++++++++++++++++++++++++ 3 files changed, 117 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass sjg@chromium.org