This EEPROM is hardware-write-protected and used to persist key information such as the serial number and MAC addresses even if the primary environment sector in NOR FLASH is overwritten.
During manufacturing, the environment is initialized from Linux and then the key parameters copied to the EEPROM via U-Boot:
env export -c -s 0x2000 $loadaddr serial# macaddr mac1addr mac2addr eeprom write $loadaddr 0x0000 0x2000
The chip is then locked via hardware for delivery.
When doing a field U-Boot upgrade, the environment is erased and reset to the defaults to avoid problems with "hwconfig" changes, etc. After loading the new U-Boot image, the hardware data is reloaded:
i2c dev 0 eeprom read $loadaddr 0x0000 0x2000 env import -c $loadaddr 0x2000 saveenv
The first three commands are saved in the "restore_eeprom" variable for user convenience. (EG: "run restore_eeprom && saveenv")
Signed-off-by: Kyle Moffett Kyle.D.Moffett@boeing.com Cc: Andy Fleming afleming@gmail.com Cc: Kumar Gala kumar.gala@freescale.com --- include/configs/HWW1U1A.h | 29 +++++++++++++++++++++++++++-- 1 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h index c7a835b..123fc57 100644 --- a/include/configs/HWW1U1A.h +++ b/include/configs/HWW1U1A.h @@ -240,7 +240,29 @@ /* Turn off RTC square-wave output to save battery */ #define CONFIG_SYS_RTC_DS1337_NOOSC
-/* PCA9554 is at I2C1-0x3f (I know it says "PCA953X", it's a PCA9554) */ +/* + * AT24C128N EEPROM at I2C0-0x53. + * + * That Atmel EEPROM has 128kbit of memory (16kByte) divided into 256 pages + * of 64 bytes per page. The chip uses 2-byte addresses and has a max write + * cycle time of 20ms according to the datasheet. + * + * NOTE: Our environment is stored on regular direct-attached FLASH, this + * chip is only used as a write-protected backup for certain key settings + * such as the serial# and macaddr values. (EG: "env import") + */ +#define CONFIG_CMD_EEPROM +#define CONFIG_ENV_EEPROM_IS_ON_I2C +#define CONFIG_SYS_I2C_EEPROM_ADDR 0x53 +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 1 << 6 == 64 byte pages */ +#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 21 + +/* + * PCA9554 is at I2C1-0x3f (I know it says "PCA953X", it's a PCA9554). You + * must first select the I2C1 bus with "i2c dev 1" or the "pca953x" command + * will not be able to access the chip. + */ #define CONFIG_PCA953X #define CONFIG_CMD_PCA953X #define CONFIG_CMD_PCA953X_INFO @@ -446,6 +468,9 @@ const char *hww1u1a_get_ps1(void); "flinitramfs=0xe8800000\0" \ "fldevicetree=0xeff20000\0" \ "flbootm=bootm ${flkernel} ${flinitramfs} ${fldevicetree}\0" \ - "flboot=run preboot; run flbootm\0" + "flboot=run preboot; run flbootm\0" \ + "restore_eeprom=i2c dev 0 && " \ + "eeprom read $loadaddr 0x0000 0x2000 && " \ + "env import -c $loadaddr 0x2000\0"
#endif /* __CONFIG_H */