diff -urN skyeye-1.2.0-orig/arch/arm/mach/at91rm92.h skyeye-1.2.0/arch/arm/mach/at91rm92.h
--- skyeye-1.2.0-orig/arch/arm/mach/at91rm92.h	2005-10-10 10:34:10.000000000 +0530
+++ skyeye-1.2.0/arch/arm/mach/at91rm92.h	2006-01-30 00:44:53.000000000 +0530
@@ -147,10 +147,11 @@
  * at91rm9200 use "USART" instead of "UART". we here use name "UART".
  * */
 
-#define AT91RM92_UART_BASE0       (0xfffc0000)
+//#define AT91RM92_UART_BASE0       (0xfffc0000)
+#define AT91RM92_UART_BASE0       (0xfffff200)
 #define AT91RM92_UART_BASE1       (0xfffc4000)
 
-#define AT91RM92_UART_SIZE	  0x4000
+#define AT91RM92_UART_SIZE	  0x200
 
 
 #define AT91RM92_ID_US0    ( 0x1 << 6)	// USART 0
diff -urN skyeye-1.2.0-orig/arch/arm/mach/skyeye_mach_at91rm92.c skyeye-1.2.0/arch/arm/mach/skyeye_mach_at91rm92.c
--- skyeye-1.2.0-orig/arch/arm/mach/skyeye_mach_at91rm92.c	2005-12-22 09:54:25.000000000 +0530
+++ skyeye-1.2.0/arch/arm/mach/skyeye_mach_at91rm92.c	2006-02-02 01:32:53.000000000 +0530
@@ -25,6 +25,9 @@
  *		walimis <wlm@student.dlut.edu.cn> 
  *		
  * */
+
+#include <stdio.h>
+
 //koodailar add for mingw 2005.12.18 ----------------------------------------
 #ifdef __MINGW32__
 #include "arch/arm/common/armdefs.h"
@@ -176,7 +179,7 @@
 					}
 			}
 			SDL_SemPost(get_mingw_read_sem());
-      printf(" \b");
+      /// printf(" \b");
 			fflush(stdout);
 		}
 	}			/* if (rcr > 0 && ... */
@@ -187,11 +190,10 @@
 static void
 at91rm92_io_do_cycle (ARMul_State * state)
 {
-
-	if (io.st.pimr != 0) {
+	if (1 || (io.st.pimr != 0)) {
 		if (io.st.piv_dc == 0) {
 			io.st.sr |= AT91RM92_ST_PITS;
-			if (io.st.imr & AT91RM92_ST_PITS) {
+			if (1 || (io.st.imr & AT91RM92_ST_PITS)) {
 				io.ipr |= AT91RM92_ID_SYS;
 			}
 			io.st.piv_dc = io.st.pimr;
@@ -202,7 +204,9 @@
 	}
 
 
-	if ((io.uart0.imr & AT91RM92_US_RXRDY)) {
+	// printf("%s: %d\n", __func__, io.uart0.imr);
+
+	if (1 || (io.uart0.imr & AT91RM92_US_RXRDY)) {
 		fd_set rfds;
 		struct timeval tv;
 
@@ -238,6 +242,8 @@
 static void
 at91rm92_uart_read (u32 offset, u32 * data)
 {
+	/// printf("TRACE: at91rm92_uart_read - Enter\n");
+
 	switch (offset) {
 	case US_MR:
 		*data = io.uart0.mr;
@@ -273,14 +279,15 @@
 		*data = io.uart0.us_if;
 		break;
 	}
-	SKYEYE_DBG ("%s(0x%x, 0x%x)\n", __func__, offset, data);
+	/// printf ("%s(0x%x, 0x%x)\n", __func__, offset, data);
+
+	// /// printf("TRACE: at91rm92_uart_read - Exit\n");
 }
 
 static void
 at91rm92_uart_write (ARMul_State * state, u32 offset, u32 data)
 {
-
-	SKYEYE_DBG ("at91rm92_uart_write(0x%x, 0x%x)\n", offset, data);
+	// /// printf ("at91rm92_uart_write(0x%x, 0x%x)\n", offset, data);
 	switch (offset) {
 	case US_CR:
 		io.uart0.cr = data;
@@ -304,6 +311,8 @@
 	case US_THR:
 		{
 			char c = data;
+			// /// printf("%c", c);
+			// fflush(stdout);
 			write (skyeye_config.uart.fd_out, &c, 1);
 			io.uart0.csr |= AT91RM92_US_TXRDY;
 		}
@@ -325,7 +334,9 @@
 		io.uart0.us_if = data;
 		break;
 	}
-	SKYEYE_DBG ("%s(0x%x, 0x%x)\n", __func__, offset, data);
+	// /// printf ("%s(0x%x, 0x%x)\n", __func__, offset, data);
+
+	// /// printf("TRACE: at91rm92_uart_write - Exit\n");
 }
 
 
@@ -333,6 +344,8 @@
 static void
 at91rm92_st_read (u32 offset, u32 * data)
 {
+	/// printf("TRACE: at91rm92_st_read - Enter\n");
+
 	switch (offset) {
 	case ST_PIMR:
 		*data = io.st.pimr;
@@ -358,10 +371,13 @@
 		*data = io.st.crtr;
 		break;
 	}
+	/// printf("TRACE: at91rm92_st_read - Exit\n");
 }
 static void
 at91rm92_st_write (ARMul_State * state, u32 offset, u32 data)
 {
+	// /// printf("TRACE: at91rm92_st_write - Enter\n");
+
 	switch (offset) {
 	case ST_CR:
 		io.st.cr = data;
@@ -393,11 +409,14 @@
 		io.st.rtar = data;
 		break;
 	}
+
+	// /// printf("TRACE: at91rm92_st_Write - Exit\n");
 }
 
 static ARMword
 at91rm92_io_read_word (ARMul_State * state, ARMword addr)
 {
+	/// printf("TRACE: at91rm92_io_read_word - Enter\n");
 
 	ARMword data = -1;
 	int i;
@@ -415,7 +434,7 @@
 	switch (addr) {
 	case AIC_IVR:		/* IVR */
 		data = io.ipr;
-		SKYEYE_DBG ("IVR irqs=%x ", data);
+		// /// printf ("IVR irqs=%x ", data);
 		for (i = 0; i < 32; i++)
 			if (data & (1 << i))
 				break;
@@ -427,7 +446,7 @@
 		else
 			data = 0;
 		io.ivr = data;
-		SKYEYE_DBG ("read IVR=%d\n", data);
+		// /// printf ("read IVR=%d\n", data);
 		break;
 	case AIC_ISR:		/* ISR: interrupt status register */
 		data = io.ivr;
@@ -438,31 +457,35 @@
 	case AIC_CISR:		/* CISR: Core interrupt status register */
 		data = io.cisr;
 		data = io.imr;
-		SKYEYE_DBG ("read CISR=%x,%x\n", data, io.intsr);
+		// /// printf ("read CISR=%x\n", data);
 		break;
 	default:
 		break;
 	}
+
+	/// printf("TRACE: at91rm92_io_read_word - Exit\n");
 	return data;
 }
 
 static ARMword
 at91rm92_io_read_byte (ARMul_State * state, ARMword addr)
 {
-	SKYEYE_DBG ("SKYEYE: at91rm92_io_read_byte error\n");
+	/// printf ("SKYEYE: at91rm92_io_read_byte error\n");
 	at91rm92_io_read_word (state, addr);
 }
 
 static ARMword
 at91rm92_io_read_halfword (ARMul_State * state, ARMword addr)
 {
-	SKYEYE_DBG ("SKYEYE: at91rm92_io_read_halfword error\n");
+	/// printf ("SKYEYE: at91rm92_io_read_halfword error\n");
 	at91rm92_io_read_word (state, addr);
 }
 
 static void
 at91rm92_io_write_word (ARMul_State * state, ARMword addr, ARMword data)
 {
+	// /// printf("TRACE: at91rm92_io_write_word - Enter\n");
+
 	if ((addr >= AT91RM92_UART_BASE0) &&
 	    (addr < AT91RM92_UART_BASE0 + AT91RM92_UART_SIZE)) {
 		at91rm92_uart_write (state, addr - AT91RM92_UART_BASE0, data);
@@ -490,22 +513,24 @@
 		at91rm92_update_int (state);
 		break;
 	default:
-		SKYEYE_DBG ("io_write_word(0x%08x) = 0x%08x\n", addr, data);
+		// /// printf ("io_write_word(0x%08x) = 0x%08x\n", addr, data);
 		break;
 	}
+
+	// /// printf("TRACE: at91rm92_io_write_word - Exit\n");
 }
 
 static void
 at91rm92_io_write_byte (ARMul_State * state, ARMword addr, ARMword data)
 {
-	SKYEYE_DBG ("SKYEYE: at91rm92_io_write_byte error\n");
+	// /// printf ("SKYEYE: at91rm92_io_write_byte error\n");
 	at91rm92_io_write_word (state, addr, data);
 }
 
 static void
 at91rm92_io_write_halfword (ARMul_State * state, ARMword addr, ARMword data)
 {
-	SKYEYE_DBG ("SKYEYE: at91rm92_io_write_halfword error\n");
+	// /// printf ("SKYEYE: at91rm92_io_write_halfword error\n");
 	at91rm92_io_write_word (state, addr, data);
 }
 
@@ -513,6 +538,8 @@
 void
 at91rm92_mach_init (ARMul_State * state, machine_config_t * this_mach)
 {
+	// /// printf("TRACE: at91rm92_mach_init - Enter\n");
+
 	ARMul_SelectProcessor (state, ARM_v4_Prop);
 	/* ARM920T uses LOW */
 	state->lateabtSig = LOW;
@@ -540,4 +567,5 @@
 	//this_mach->state = (void *)state;
 
 
+	// /// printf("TRACE: at91rm92_mach_init - Exit\n");
 }
diff -urN skyeye-1.2.0-orig/arch/arm/mach/skyeye_mach_ns9750.c skyeye-1.2.0/arch/arm/mach/skyeye_mach_ns9750.c
--- skyeye-1.2.0-orig/arch/arm/mach/skyeye_mach_ns9750.c	2005-12-22 09:54:25.000000000 +0530
+++ skyeye-1.2.0/arch/arm/mach/skyeye_mach_ns9750.c	2006-01-29 17:43:48.000000000 +0530
@@ -437,7 +437,7 @@
 	case AIC_CISR:		/* CISR: Core interrupt status register */
 		data = io.cisr;
 		data = io.imr;
-		SKYEYE_DBG ("read CISR=%x,%x\n", data, io.intsr);
+		SKYEYE_DBG ("read CISR=%x\n", data);
 		break;
 	default:
 		break;

