This adds missing hifsys reset parts in header files.
Tested-by: Frank Wunderlich frank-w@public-files.de Signed-off-by: Ryder Lee ryder.lee@mediatek.com --- arch/arm/dts/mt7623.dtsi | 7 +++++++ include/dt-bindings/reset/mtk-reset.h | 9 +++++++++ 2 files changed, 16 insertions(+)
diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi index 448d1d7381..9f9eec8b9c 100644 --- a/arch/arm/dts/mt7623.dtsi +++ b/arch/arm/dts/mt7623.dtsi @@ -248,6 +248,13 @@ status = "disabled"; };
+ hifsys: syscon@1a000000 { + compatible = "mediatek,mt7623-hifsys", "syscon"; + reg = <0x1a000000 0x1000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + ethsys: syscon@1b000000 { compatible = "mediatek,mt7623-ethsys", "syscon"; reg = <0x1b000000 0x1000>; diff --git a/include/dt-bindings/reset/mtk-reset.h b/include/dt-bindings/reset/mtk-reset.h index 5f0a74f280..78fcdab009 100644 --- a/include/dt-bindings/reset/mtk-reset.h +++ b/include/dt-bindings/reset/mtk-reset.h @@ -15,4 +15,13 @@ #define ETHSYS_MCM_RST 2 #define ETHSYS_SYS_RST 0
+/* HIFSYS resets */ +#define HIFSYS_PCIE2_RST 26 +#define HIFSYS_PCIE1_RST 25 +#define HIFSYS_PCIE0_RST 24 +#define HIFSYS_UPHY1_RST 22 +#define HIFSYS_UPHY0_RST 21 +#define HIFSYS_UHOST1_RST 4 +#define HIFSYS_UHOST0_RST 3 + #endif /* _DT_BINDINGS_MTK_RESET_H_ */