Hi Tushar,
On Tue, Apr 9, 2013 at 3:23 PM, Jaehoon Chung jh80.chung@samsung.com wrote:
On 04/09/2013 06:41 PM, Jagan Teki wrote:
Hi Tushar,
On Mon, Apr 8, 2013 at 9:22 AM, Tushar Behera tushar.behera@linaro.org wrote:
On 04/07/2013 10:27 AM, Jagan Teki wrote:
Hi,
I saw that you have been added the SDHCI_QUIRK_WAIT_SEND_CMD on below commit http://git.denx.de/?p=u-boot.git;a=commitdiff;h=13243f2eafc4292917178051fe1b...
I need few quires regarding the QUIRK delay.
- Why the delay is 1000
if (host->quirks & SDHCI_QUIRK_WAIT_SEND_CMD)udelay(1000);
- is this delay specific to s5p_sdhci controller?
BTW: Can you please help me out what is the reason for max and min clocks are at 52000000 and 400000 respectively.
As per my knowledge the max clock of sdhci on spec-2 is 50000000 (50Mhz), I may be in correct.
Right..But eMMC can use up to 52MHz. And see into the drivers/mmc/mmc.c..SD-card's max_dtr is set to 50MHz, if card is supported HS_MODE.
Ok, Thanks for your information. means the max_clk 52MHz will handle eMMC as well.. is it? What is this min_clk as 400000? Any idea if the max_clk and min_clk value are initialized to 0 so-that sdhci will re-init based on the capabilities register Base_Clock_Frequency_for_SD_Clock[13:8].?
Thanks, Jagan.
Request for your help.
Thanks, Jagan.
This was specific to s5p_sdhci driver so as to replicate the behavior of s5p_mmc driver.
- I have an issue "Controller never released inhibit bit(s)" but when I enable this quirk on my driver with udelay(10000), it's
working.
I am not sure about the exact delay as per the spec. I have added Jaehoon to CC who might have additional information about this.
Could you please help me.
Thanks, Jagan.
-- Tushar Behera