Add a device tree node for the Allwinner R40/V40 GMAC gigabit ethernet interface. The R40 SoC does not use the syscon register for GMAC settings.
Signed-off-by: Lothar Felten lothar.felten@gmail.com --- arch/arm/dts/sun8i-r40.dtsi | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+)
diff --git a/arch/arm/dts/sun8i-r40.dtsi b/arch/arm/dts/sun8i-r40.dtsi index ee22f6eb3a..b46fcbb0b9 100644 --- a/arch/arm/dts/sun8i-r40.dtsi +++ b/arch/arm/dts/sun8i-r40.dtsi @@ -168,6 +168,27 @@ #size-cells = <0>; };
+ gmac: ethernet@01c50000 { + compatible = "allwinner,sun8i-r40-gmac"; + reg = <0x01c50000 0x2000>; + interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq"; + clocks = <&osc24M>, <&osc24M>; + clock-names = "stmmaceth", "allwinner_gmac_tx"; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins_rgmii>; + phy-mode = "rgmii"; + status = "disabled"; + + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + }; + }; + gic: interrupt-controller@1c81000 { compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; reg = <0x01c81000 0x1000>,