Hi Marek,
On 12/16/2015 07:40 AM, Marek Vasut wrote:
Add DDR3 calibration code for i.MX6Q, i.MX6D and i.MX6DL. This code fine-tunes the behavior of the MMDC controller in order to improve the signal integrity and memory stability.
I'm glad to see that others are interested in this.
I've been working on something similar, but struggling to have time to finish and clean it up: https://github.com/ericnelsonaz/u-boot/tree/memcal-pass1
My aim is/was a bit different though, and aims to be a replacement for the DDR stress tool, which is cumbersome to use.
To do that, I put together a pseudo-board with Kconfig options for the serial console, memory bus width, and such.
Signed-off-by: Marek Vasut marex@denx.de Cc: Stefano Babic sbabic@denx.de
arch/arm/cpu/armv7/mx6/ddr.c | 559 ++++++++++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/mx6-ddr.h | 5 + 2 files changed, 564 insertions(+)
diff --git a/arch/arm/cpu/armv7/mx6/ddr.c b/arch/arm/cpu/armv7/mx6/ddr.c index 6b039e4..194411f 100644 --- a/arch/arm/cpu/armv7/mx6/ddr.c +++ b/arch/arm/cpu/armv7/mx6/ddr.c @@ -13,6 +13,565 @@ #include <asm/io.h> #include <asm/types.h>
I'll review this in detail later, but off-hand, I think this could use a new CONFIG_ variable to exclude it from boards that don't use it.
It also shouldn't be difficult to support i.MX6SL and LPDDR here.
+#if defined(CONFIG_MX6QDL) || defined(CONFIG_MX6Q) || defined(CONFIG_MX6D)
+static int wait_for_bit(void *reg, const uint32_t mask, bool set) +{
- unsigned int timeout = 1000;
- u32 val;
Regards,
Eric