Hi Andre,
On 02/10/2013 21:41, Andre Renaud wrote:
Can you recommend any mechanism for debugging the boot rom execution? I can see on the SPI bus that it is trying to read from the boot flash, and it is getting the correct data (ie, the u-boot.imx image is programmed properly). However it is still failing and ending up in USB fall-back mode. Given your comments about the dcd_ptr, I can assume that isn't the problem, which leaves me at a bit of a dead end.
Are you sure that the DDR controller is corrctly initialized ? You can check with the JTAG debugger if the RAM is working as expected. If there are some errors in your DCD table and the controller is not correctly set, the processor will fall back to USB.
You could also set a breakpoint to the U-Boot start address - after loading U-Boot, the SOC jumps to this address. You can check if it is hit.
Best regards, Stefano Babic