3 Jun
2015
3 Jun
'15
4:10 p.m.
On Wed, Jun 03, 2015 at 02:43:20PM +0530, Lokesh Vutla wrote:
This series updates the DDR3 init sequence and adds support for hw leveling for all DRA7 platforms.
Tested memtest and reboot on DRA7-evm , DRA72-evm, BeagleBoard-x15 boards.
For sanity sake, tested on omap5_uevm (but indeed, the code didn't change just a few related calling paths for that family).
--
Tom