The RAM configuration is set by the bootrom to values specified by the BCT. To query the available RAM size of a board we can easily read back those values instead of using the hardcoded ODMdata. This allows for a single u-boot image on similar boards with different amount of RAM.
Note that the register description in the TRM is not entirely correct here.
Signed-off-by: Lucas Stach dev@lynxeye.de CC: Stephen Warren swarren@wwwdotorg.org CC: Tom Warren twarren.nvidia@gmail.com CC: Marek Vasut marex@denx.de --- arch/arm/cpu/armv7/tegra2/board.c | 21 ++++++++++++++++++++- arch/arm/include/asm/arch-tegra2/tegra2.h | 1 + 2 Dateien geändert, 21 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/arch/arm/cpu/armv7/tegra2/board.c b/arch/arm/cpu/armv7/tegra2/board.c index 923678d..850a517 100644 --- a/arch/arm/cpu/armv7/tegra2/board.c +++ b/arch/arm/cpu/armv7/tegra2/board.c @@ -23,12 +23,14 @@
#include <common.h> #include <asm/io.h> -#include <asm/arch/ap20.h> +#include <asm/sizes.h> #include <asm/arch/clock.h> #include <asm/arch/funcmux.h> #include <asm/arch/pmc.h> #include <asm/arch/sys_proto.h> #include <asm/arch/tegra2.h> +#include <asm/arch/pmc.h> +#include <asm/arch/emc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -47,6 +49,22 @@ enum {
unsigned int query_sdram_size(void) { +#ifdef CONFIG_TEGRA_RAMSIZE_BCT + /* get the memory size from the BCT programmed EMC register */ + struct emc_ctlr *const emc = (struct emc_ctlr *)TEGRA2_EMC_BASE; + u32 cfg, cfg1 = 0, sz1 = 0, sz2 = 0; + + cfg = readl(&emc->adr_cfg); + sz1 = SZ_4M << ((cfg & (0xf << 16)) >> 16); + + /* if EMEM_NUMDEV is N2 we have to also read info for the second device */ + if (cfg & (0x1 << 25)) { + cfg1 = readl(&emc->adr_cfg1); + sz2 = SZ_4M << ((cfg1 & (0xf << 16)) >> 16); + } + + return sz1 + sz2; +#else struct pmc_ctlr *const pmc = (struct pmc_ctlr *)TEGRA2_PMC_BASE; u32 reg;
@@ -63,6 +81,7 @@ unsigned int query_sdram_size(void) case 3: return 0x40000000; /* 1GB */ } +#endif }
int dram_init(void) diff --git a/arch/arm/include/asm/arch-tegra2/tegra2.h b/arch/arm/include/asm/arch-tegra2/tegra2.h index d4ada10..8b57b77 100644 --- a/arch/arm/include/asm/arch-tegra2/tegra2.h +++ b/arch/arm/include/asm/arch-tegra2/tegra2.h @@ -41,6 +41,7 @@ #define NV_PA_APB_UARTE_BASE (NV_PA_APB_MISC_BASE + 0x6400) #define TEGRA2_SPI_BASE (NV_PA_APB_MISC_BASE + 0xC380) #define TEGRA2_PMC_BASE (NV_PA_APB_MISC_BASE + 0xE400) +#define TEGRA2_EMC_BASE (NV_PA_APB_MISC_BASE + 0xF400) #define TEGRA2_FUSE_BASE (NV_PA_APB_MISC_BASE + 0xF800) #define NV_PA_CSITE_BASE 0x70040000 #define TEGRA_USB1_BASE 0xC5000000