Re: [PATCH v2 06/12] mips: traps: Set WG bit in EBase register on Octeon

Am 14.05.20 um 11:59 schrieb Stefan Roese:

WG (bit 11) needs to be set on Octeon to enable writing bits 63:30 of the exception base register.

Signed-off-by: Stefan Roese sr@denx.de

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Changes in v2:

• Move bit macro definition to mipsregs.h

arch/mips/include/asm/mipsregs.h | 1 + arch/mips/lib/traps.c | 4 ++++ 2 files changed, 5 insertions(+)

applied to u-boot-mips/next, thanks.