10 Mar
2006
10 Mar
'06
9:59 a.m.
wd@denx.de wrote on Friday, March 10, 2006 9:42 AM:
Um, in my opinion the patch does a runtime check of the cpu revision, only the written value is dependent on the configured CAS latency.
Configured where?
+#if defined(DDR_CASLAT_20)
I can't find any definition or use of DDR_CASLAT_20 anywhere in U-Boot...
Hm, DDR_CASLAT_20 was already used in the very same file (board\tqm834x\tqm834x.c), which was introduced by DENX for the TQM834x porting.
In include/configs/tqm834x.h I found the line:
#define DDR_CASLAT_25 /* CASLAT set to 2.5 */
which is never used anywhere in the code. Perhaps a typo and DDR_CASLAT_20 was meant?
Regards, Martin