Fix PAD_CTL_SPEED_LOW pad property macro definition. PAT_CTL_SPEED_LOW occupies the 6th and 7th bit. To mx6sx: 0 0 | 50MHZ — Low(50 MHz) 0 1 | 100MHZ — Medium (100 MHz) 1 0 | 100MHZ — Medium (100 MHz) 1 1 | 200MHZ — Maximum (200 MHz)
To Other mx6 socs: 0 0 | RESERVED0 — Reserved 0 1 | 50MHZ — Low (50 MHz) 1 0 | 100MHZ — Medium (100 MHz) 1 1 | 200MHZ — Maximum (200 MHz)
Signed-off-by: Peng Fan Peng.Fan@freescale.com --- arch/arm/include/asm/imx-common/iomux-v3.h | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index e0a49be..5c31eb3 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -98,7 +98,11 @@ typedef u64 iomux_v3_cfg_t;
#define PAD_CTL_ODE (1 << 11)
+#ifdef CONFIG_MX6SX +#define PAD_CTL_SPEED_LOW (0 << 6) +#else #define PAD_CTL_SPEED_LOW (1 << 6) +#endif #define PAD_CTL_SPEED_MED (2 << 6) #define PAD_CTL_SPEED_HIGH (3 << 6)