Define ARCH_MXC for i.MX devices. This is useful to identify features or behaviors common to all i.MX SoCs.
The i.MX28 is omitted because its architecture is a bit different (like imx/mxc vs. mxs in Linux).
Signed-off-by: Benoît Thébaudeau benoit.thebaudeau@advansee.com Cc: Stefano Babic sbabic@denx.de Cc: Andy Fleming afleming@gmail.com Cc: Kim Phillips kim.phillips@freescale.com --- Changes for v2: None. Changes for v3: - Rename ARCH_IMX to ARCH_MXC to emphasize the difference between mxc and mxs.
.../arch/arm/include/asm/arch-imx/imx-regs.h | 3 +++ .../arch/arm/include/asm/arch-mx25/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx27/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx31/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx35/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx5/imx-regs.h | 2 ++ .../arch/arm/include/asm/arch-mx6/imx-regs.h | 2 ++ 7 files changed, 15 insertions(+)
diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-imx/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-imx/imx-regs.h index ec94ba9..4de0779 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-imx/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-imx/imx-regs.h @@ -1,5 +1,8 @@ #ifndef _IMX_REGS_H #define _IMX_REGS_H + +#define ARCH_MXC + /* ------------------------------------------------------------------------ * Motorola IMX system registers * ------------------------------------------------------------------------ diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx25/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx25/imx-regs.h index cf925d7..672f9d7 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx25/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx25/imx-regs.h @@ -172,6 +172,8 @@ struct aips_regs {
#endif
+#define ARCH_MXC + /* AIPS 1 */ #define IMX_AIPS1_BASE (0x43F00000) #define IMX_MAX_BASE (0x43F04000) diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx27/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx27/imx-regs.h index ced5b2a..546b8a1 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx27/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx27/imx-regs.h @@ -217,6 +217,8 @@ struct fuse_bank0_regs {
#endif
+#define ARCH_MXC + #define IMX_IO_BASE 0x10000000
#define IMX_AIPI1_BASE (0x00000 + IMX_IO_BASE) diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx31/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx31/imx-regs.h index 7ddbbd6..766049b 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx31/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx31/imx-regs.h @@ -541,6 +541,8 @@ struct esdc_regs {
#endif
+#define ARCH_MXC + #define __REG(x) (*((volatile u32 *)(x))) #define __REG16(x) (*((volatile u16 *)(x))) #define __REG8(x) (*((volatile u8 *)(x))) diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/imx-regs.h index 3146006..d6d7225 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx35/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx35/imx-regs.h @@ -25,6 +25,8 @@ #ifndef __ASM_ARCH_MX35_H #define __ASM_ARCH_MX35_H
+#define ARCH_MXC + /* * IRAM */ diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/imx-regs.h index 7f66b61..fb8668f 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx5/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx5/imx-regs.h @@ -23,6 +23,8 @@ #ifndef __ASM_ARCH_MX5_IMX_REGS_H__ #define __ASM_ARCH_MX5_IMX_REGS_H__
+#define ARCH_MXC + #if defined(CONFIG_MX51) #define IRAM_BASE_ADDR 0x1FFE0000 /* internal ram */ #define IPU_SOC_BASE_ADDR 0x40000000 diff --git u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx6/imx-regs.h u-boot-4d3c95f/arch/arm/include/asm/arch-mx6/imx-regs.h index 5d77603..76fab09 100644 --- u-boot-4d3c95f.orig/arch/arm/include/asm/arch-mx6/imx-regs.h +++ u-boot-4d3c95f/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -19,6 +19,8 @@ #ifndef __ASM_ARCH_MX6_IMX_REGS_H__ #define __ASM_ARCH_MX6_IMX_REGS_H__
+#define ARCH_MXC + #define CONFIG_SYS_CACHELINE_SIZE 32
#define ROMCP_ARB_BASE_ADDR 0x00000000