
5 Dec
2014
5 Dec
'14
5:32 p.m.
On 11/12/2014 02:30 AM, Shaveta Leekha wrote:
- Enable SGMII support for 0x8d Serdes 2 protocol. - Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol. - Updated debug statement - Add Alternate LC VCO protocols(0x8d-->0x8c, 0xb2-->0xb1) - Rename onboard PHY address defines for more readability - Add these new Defines in B4860QDS.h file
Signed-off-by: Shaveta Leekha shaveta@freescale.com Signed-off-by: Poonam Aggrwal poonam.aggrwal@freescale.com Signed-off-by: Suresh Gupta suresh.gupta@freescale.com
Applied to u-boot-mpc85xx, awaiting upstream.
York