Hi Marek,
2015-12-20 11:58 GMT+09:00 Marek Vasut marex@denx.de:
This register is not configured on Altera SoCFPGA incarnation of the Denali NAND flash block. Unless this register is initialized, the IP will return corrupted data upon any read attempt from the NAND.
Initialize the register to the same value is the one used in full U-Boot to fix this issue.
Signed-off-by: Marek Vasut marex@denx.de Cc: Masahiro Yamada yamada.masahiro@socionext.com Cc: Scott Wood scottwood@freescale.com
As for UniPhier SoCs, this register has been set to 8 by the boot ROM when booting from a NAND device.
So, my SoCs work with/without this patch because CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES is defined 8 in my defconfigs.
Anyway, I am OK with this patch.
drivers/mtd/nand/denali_spl.c | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/nand/denali_spl.c b/drivers/mtd/nand/denali_spl.c index 1587413..8c707d2 100644 --- a/drivers/mtd/nand/denali_spl.c +++ b/drivers/mtd/nand/denali_spl.c @@ -168,6 +168,10 @@ void nand_init(void) page_size = readl(denali_flash_reg + DEVICE_MAIN_AREA_SIZE); oob_size = readl(denali_flash_reg + DEVICE_SPARE_AREA_SIZE); pages_per_block = readl(denali_flash_reg + PAGES_PER_BLOCK);
/* Spare area skip bytes is NOT programmed by hardware %^( */
What is "%^(" ? Do you need this comment?
Otherwise,
Acked-by: Masahiro Yamada yamada.masahiro@socionext.com