On Mon, Sep 25, 2017 at 4:10 PM, Lukasz Majewski lukma@denx.de wrote:
The content of Bank Address Register (BAR) is volatile. It is cleared after power cycle or reset command (RESET F0h).
Some memories (like e.g. s25fl256s) use it to access memory larger than 0x1000000 (16 MiB).
The problem shows up when one:
- Reads/writes/erases memory > 16 MiB
- Calls "reset" u-boot command (which is not causing BAR to be cleared)
In the above scenario, the SoC ROM sends 0x000000 address to read SPL. Unfortunately, the BA24 bit is still set and hence it receives content from 0x1000000 (16 MiB) memory address. As a result the SoC aborts and we hang. Only power cycle can take the SoC out of this state.
How to reproduce/test:
sf probe; sf erase 0x1200000 0x800000; reset sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset sf probe; sf read 0x11000000 0x1200000 0x800000; reset
Sorry, I didn't follow this test.. are you writing on at 18MiB offset and doing reset how it will reproduce? because we can write it 0x0 and after reset the ROM look for 16MiB on this flash this is what you concern about right?
thanks!