Add a new link config which uses 64-bit U-Boot. This is not fully functional but is it a start. Missing features:
- SDRAM sizing - Booting linux - EFI support - SCSI device init (and others)
Signed-off-by: Simon Glass sjg@chromium.org ---
Changes in v3: - Drop patch 'x86: Add basic support for U-Boot as a 64-bit EFI application' - Drop patch 'Mention the MRC region in the README' - Drop patch 'x86: link: Add build options for SPL' - Drop unnecessary defconfig options for chromebook_link64 - Avoid including helloworld.efi in the 64-bit U-Boot
Changes in v2: - Drop patch 'video: Use ulong for video frame buffer address' - Add a new 64-bit link config instead of changing the existing one
board/google/Kconfig | 7 +++ board/google/chromebook_link/Kconfig | 2 +- board/google/chromebook_link/MAINTAINERS | 7 +++ configs/chromebook_link64_defconfig | 89 ++++++++++++++++++++++++++++++++ 4 files changed, 104 insertions(+), 1 deletion(-) create mode 100644 configs/chromebook_link64_defconfig
diff --git a/board/google/Kconfig b/board/google/Kconfig index 7ba73a2461d..e56c026ef6d 100644 --- a/board/google/Kconfig +++ b/board/google/Kconfig @@ -22,6 +22,13 @@ config TARGET_CHROMEBOOK_LINK and it provides a 2560x1700 high resolution touch-enabled LCD display.
+config TARGET_CHROMEBOOK_LINK64 + bool "Chromebook link 64-bit" + help + This is the Chromebook Pixel released in 2013. With this config + U-Boot is built as a 64-bit binary. This allows testing while this + feature is being completed. + config TARGET_CHROMEBOX_PANTHER bool "Chromebox panther (not available)" select n diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 5c57945d77a..8999b582943 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -1,4 +1,4 @@ -if TARGET_CHROMEBOOK_LINK +if TARGET_CHROMEBOOK_LINK || TARGET_CHROMEBOOK_LINK64
config SYS_BOARD default "chromebook_link" diff --git a/board/google/chromebook_link/MAINTAINERS b/board/google/chromebook_link/MAINTAINERS index bc253a2ba7b..e7aef53390c 100644 --- a/board/google/chromebook_link/MAINTAINERS +++ b/board/google/chromebook_link/MAINTAINERS @@ -4,3 +4,10 @@ S: Maintained F: board/google/chromebook_link/ F: include/configs/chromebook_link.h F: configs/chromebook_link_defconfig + +CHROMEBOOK LINK 64-bit BOARD +M: Simon Glass sjg@chromium.org +S: Maintained +F: board/google/chromebook_link/ +F: include/configs/chromebook_link.h +F: configs/chromebook_link64_defconfig diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig new file mode 100644 index 00000000000..dd8175ec767 --- /dev/null +++ b/configs/chromebook_link64_defconfig @@ -0,0 +1,89 @@ +CONFIG_X86=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y +CONFIG_SPL_SPI_SUPPORT=y +CONFIG_X86_RUN_64BIT=y +CONFIG_VENDOR_GOOGLE=y +CONFIG_DEFAULT_DEVICE_TREE="chromebook_link" +CONFIG_TARGET_CHROMEBOOK_LINK=y +CONFIG_ENABLE_MRC_CACHE=y +CONFIG_HAVE_MRC=y +CONFIG_SMP=y +CONFIG_HAVE_VGA_BIOS=y +CONFIG_FIT=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_BOOTSTAGE=y +CONFIG_BOOTSTAGE_REPORT=y +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_SPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_CPU_SUPPORT=y +CONFIG_SPL_NET_SUPPORT=y +CONFIG_SPL_PCI_SUPPORT=y +CONFIG_SPL_PCH_SUPPORT=y +CONFIG_SPL_RTC_SUPPORT=y +CONFIG_SPL_TIMER_SUPPORT=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_CPU=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +CONFIG_CMD_SF=y +CONFIG_CMD_SPI=y +CONFIG_CMD_USB=y +CONFIG_CMD_GPIO=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_DHCP=y +# CONFIG_CMD_NFS is not set +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_CMD_BOOTSTAGE=y +CONFIG_CMD_TPM=y +CONFIG_CMD_TPM_TEST=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_CONTROL=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_SPL_DM=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_CPU=y +CONFIG_DM_I2C=y +CONFIG_SYS_I2C_INTEL=y +CONFIG_CROS_EC=y +CONFIG_CROS_EC_LPC=y +CONFIG_SPI_FLASH=y +CONFIG_SPI_FLASH_GIGADEVICE=y +CONFIG_SPI_FLASH_MACRONIX=y +CONFIG_SPI_FLASH_WINBOND=y +CONFIG_DM_PCI=y +CONFIG_DM_RTC=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0x3f8 +CONFIG_DEBUG_UART_CLOCK=1843200 +CONFIG_DEBUG_UART_BOARD_INIT=y +CONFIG_SYS_NS16550=y +CONFIG_ICH_SPI=y +CONFIG_TIMER=y +CONFIG_TPM_TIS_LPC=y +CONFIG_USB=y +CONFIG_DM_USB=y +CONFIG_USB_STORAGE=y +CONFIG_DM_VIDEO=y +CONFIG_USB_KEYBOARD=y +CONFIG_VIDEO_VESA=y +CONFIG_FRAMEBUFFER_SET_VESA_MODE=y +CONFIG_FRAMEBUFFER_VESA_MODE_11A=y +CONFIG_VIDEO_IVYBRIDGE_IGD=y +CONFIG_CONSOLE_SCROLL_LINES=5 +CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_TPM=y +# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set