Dear "Gutierrez Gomez Jesus-B16947",
please restrict the line length of your postings to some 70 characters or so. Thanks.
In message F433001A73130B4C92788BA2D371731D070C27CF@az33exm20.fsl.freescale.net you wrote:
Are you 100% sure the timing setup of your board's SDRAM are okay? If you c opied the setup from another board (with another SDRAM chip), it might be t he case where you're not meeting the timing characteristics of the new SDRA M chip and therefore SDRAM will have problems when more transactions are de manded (for example, U-boot relocation, or mtest).
Please double check the timing spec of your SDRAM chip (or perhaps the whol e configuration) and adjust U-boot accordingly to set them up.
And note that timing is just one thing, but strictly adhering to the required initialization sequence (including any delays, dummy reads or writes etc.) is at least as important, if not more.
Best regards,
Wolfgang Denk