This patch adds support for the PDU001 board.
Signed-off-by: Felix Brack fb@ltec.ch ---
arch/arm/Kconfig | 1 + arch/arm/cpu/armv7/am33xx/Kconfig | 9 ++ board/eets/pdu001/Kconfig | 66 ++++++++++ board/eets/pdu001/MAINTAINERS | 6 + board/eets/pdu001/Makefile | 13 ++ board/eets/pdu001/README | 35 +++++ board/eets/pdu001/board.c | 263 ++++++++++++++++++++++++++++++++++++++ board/eets/pdu001/board.h | 30 +++++ board/eets/pdu001/mux.c | 146 +++++++++++++++++++++ configs/pdu001_defconfig | 33 +++++ include/configs/pdu001.h | 117 +++++++++++++++++ 11 files changed, 719 insertions(+) create mode 100644 board/eets/pdu001/Kconfig create mode 100644 board/eets/pdu001/MAINTAINERS create mode 100644 board/eets/pdu001/Makefile create mode 100644 board/eets/pdu001/README create mode 100644 board/eets/pdu001/board.c create mode 100644 board/eets/pdu001/board.h create mode 100644 board/eets/pdu001/mux.c create mode 100644 configs/pdu001_defconfig create mode 100644 include/configs/pdu001.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d7a9b11..7ab966b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1020,6 +1020,7 @@ source "board/vscom/baltos/Kconfig" source "board/woodburn/Kconfig" source "board/work-microwave/work_92105/Kconfig" source "board/zipitz2/Kconfig" +source "board/eets/pdu001/Kconfig"
source "arch/arm/Kconfig.debug"
diff --git a/arch/arm/cpu/armv7/am33xx/Kconfig b/arch/arm/cpu/armv7/am33xx/Kconfig index 8fd32c2..d5217b1 100644 --- a/arch/arm/cpu/armv7/am33xx/Kconfig +++ b/arch/arm/cpu/armv7/am33xx/Kconfig @@ -79,6 +79,15 @@ config TARGET_PEPPER select DM_SERIAL select DM_GPIO
+config TARGET_PDU001 + bool "Support PDU001" + select DM + select DM_SERIAL + help + Support for PDU001 platform developed by EETS GmbH. + The PDU001 is a processor and display unit developed around + the Computing-Module m2 from bytes at work AG. + endchoice
endif diff --git a/board/eets/pdu001/Kconfig b/board/eets/pdu001/Kconfig new file mode 100644 index 0000000..fe5f520 --- /dev/null +++ b/board/eets/pdu001/Kconfig @@ -0,0 +1,66 @@ +# Copyright (c) 2016, EETS GmbH +# +# SPDX-License-Identifier: GPL-2.0+ +# + +if TARGET_PDU001 + +config SYS_BOARD + default "pdu001" + +config SYS_VENDOR + default "eets" + +config SYS_SOC + default "am33xx" + +config SYS_CONFIG_NAME + default "pdu001" + +config CONS_INDEX + int "UART used for console" + range 1 6 + default 4 + help + The AM335x SoC has a total of 6 UARTs (UART0 to UART5 as referenced + in documentation, etc) available to it. The best choice for the + PDU001 is UART3 as it is wired to the header K2; enter 4 here to + use UART3. UART0 is connected to the EIA-485 transceiver. If you + really need to use it, you are advised to remove the transceiver U14 + from the board. UART1 is wired to the backplane and therefore + accessible from there or by the backplane connector K1 of the PDU. + Any other UART then UART3 (enter 4 here), UART1 (enter 2 here) or + UART0 (enter 1 here) are not sensible since they are not sired to + any connector and therefore difficult to access. + +choice + prompt "State of Run LED" + default PDU001_RUN_LED_RED + help + The PDU001 has a bi-color (red/green) LED labeled 'Run' which + can be used to indicate the operating state of the board. By + default it will be lit red by U-Boot. Later in the start-up + process it can be changed to green (or heartbeat or anything else) + by the kernel or some other software. + +config RUN_LED_RED + bool + prompt "Red" + help + Lit Run LED red. + +config RUN_LED_GREEN + bool + prompt "Green" + help + Lit Run LED green. + +config RUN_LED_OFF + bool + prompt "Off" + help + Do not lit Run LED. + +endchoice + +endif diff --git a/board/eets/pdu001/MAINTAINERS b/board/eets/pdu001/MAINTAINERS new file mode 100644 index 0000000..b5edc4d --- /dev/null +++ b/board/eets/pdu001/MAINTAINERS @@ -0,0 +1,6 @@ +PDU001 BOARD +M: Felix Brack f.brack@eets.ch +S: Maintained +F: board/eets/pdu001/ +F: include/configs/pdu001.h +F: configs/pdu001_defconfig diff --git a/board/eets/pdu001/Makefile b/board/eets/pdu001/Makefile new file mode 100644 index 0000000..804ac37 --- /dev/null +++ b/board/eets/pdu001/Makefile @@ -0,0 +1,13 @@ +# +# Makefile +# +# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),) +obj-y := mux.o +endif + +obj-y += board.o diff --git a/board/eets/pdu001/README b/board/eets/pdu001/README new file mode 100644 index 0000000..c7e4c31 --- /dev/null +++ b/board/eets/pdu001/README @@ -0,0 +1,35 @@ +# Copyright (c) 2016, EETS GmbH +# +# SPDX-License-Identifier: GPL-2.0+ +# + +Summary +======= + +This document covers the PDU001 target. + +Hardware +======== + +The PDU-001 (Processor and Display Unit) is a plugin card for 19" racks. It is +manufactured by EETS GmbH (https://www.eets.ch). The core of the board is a m2 +SOM from bytes at work (https://www.bytesatwork.ch) which in turn is based on +AM3352 SOC from TI (http://www.ti.com). + +Customization +============= + +As usual the console serial interface is set by CONFIG_CONS_INDEX. Best choice +is 4 here since UART3 is wired to the connector K2. +The Run LED on the PDU-001 can be turned on red by setting CONFIG_RUN_LED_RED +or green by setting CONFIG_RUN_LED_GREEN. Setting CONFIG_RUN_LED_OFF will turn +off the Run LED. + +Booting +======= + +The system boots from either eMMC or SD card cage. It will first try to boot +from the SD card cage. If this fails (missing or unbootable SD card) it will +try to boot from the internal eMMC. The root file system is always expected to +be located in the second partition of the device (eMMC or SD card) that pro- +vided the boot loader. diff --git a/board/eets/pdu001/board.c b/board/eets/pdu001/board.c new file mode 100644 index 0000000..d6b41da --- /dev/null +++ b/board/eets/pdu001/board.c @@ -0,0 +1,263 @@ +/* + * board.c + * + * Board functions for EETS PDU001 board + * + * Copyright (C) 2016, EETS GmbH, http://www.eets.ch/ + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <errno.h> +#include <spl.h> +#include <asm/arch/cpu.h> +#include <asm/arch/hardware.h> +#include <asm/arch/omap.h> +#include <asm/arch/ddr_defs.h> +#include <asm/arch/clock.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc_host_def.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/mem.h> +#include <asm/io.h> +#include <asm/emif.h> +#include <asm/gpio.h> +#include <i2c.h> +#include <power/tps65910.h> +#include <environment.h> +#include <watchdog.h> +#include <environment.h> +#include "board.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* + * boot device save register + * ------------------------- + * The boot device can be quired by 'spl_boot_device()' in + * 'am33xx_spl_board_init'. However it can't be saved in the u-boot + * environment here. In turn 'spl_boot_device' can't be called in + * 'board_late_init' which allows writing to u-boot environment. + * To get the boot device from 'am33xx_spl_board_init' to + * 'board_late_init' we therefore use a scratch register from the RTC. + */ +#define CONFIG_SYS_RTC_SCRATCH0 0x60 +#define BOOT_DEVICE_SAVE_REGISTER (RTC_BASE + CONFIG_SYS_RTC_SCRATCH0) + +#ifdef CONFIG_SPL_BUILD +static void save_boot_device(void) +{ + *((u32 *)(BOOT_DEVICE_SAVE_REGISTER)) = spl_boot_device(); +} +#endif + +u32 boot_device(void) +{ + return *((u32 *)(BOOT_DEVICE_SAVE_REGISTER)); +} + +/* Store the boot device in the environment variable 'boot_device' */ +static void setenv_boot_device(void) +{ + switch (boot_device()) { + case BOOT_DEVICE_MMC1: { + setenv("boot_device", "emmc"); + break; + } + case BOOT_DEVICE_MMC2: { + setenv("boot_device", "sdcard"); + break; + } + default: { + setenv("boot_device", "unknown"); + break; + } + } +} + +static void set_run_led(struct i2c_adapter *adap) +{ + uint8_t val = 0; + + if (IS_ENABLED(CONFIG_RUN_LED_RED)) + val = 1; + else if (IS_ENABLED(CONFIG_RUN_LED_GREEN)) + val = 4; + + adap->write(adap, 0x60, 6, 1, &val, 1); +} + +/* Set 'serial#' to the EUI-48 value of board node ID chip */ +static void setenv_serial(struct i2c_adapter *adap) +{ + uint8_t valb = 1; + char serial[13]; + int n; + + for (n = 0; n < sizeof(serial); n += 2) { + adap->read(adap, 0x50, 0xFA+n/2, 1, &valb, 1); + sprintf(serial+n, "%02X", valb); + } + serial[12] = '\0'; + setenv("serial#", serial); +} + +#ifdef CONFIG_SPL_BUILD +static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE; +#endif + +#ifndef CONFIG_SKIP_LOWLEVEL_INIT +static const struct ddr_data ddr2_data = { + .datardsratio0 = MT47H128M16RT25E_RD_DQS, + .datafwsratio0 = MT47H128M16RT25E_PHY_FIFO_WE, + .datawrsratio0 = MT47H128M16RT25E_PHY_WR_DATA, +}; + +static const struct cmd_control ddr2_cmd_ctrl_data = { + .cmd0csratio = MT47H128M16RT25E_RATIO, + .cmd1csratio = MT47H128M16RT25E_RATIO, + .cmd2csratio = MT47H128M16RT25E_RATIO, +}; + +static const struct emif_regs ddr2_emif_reg_data = { + .sdram_config = MT47H128M16RT25E_EMIF_SDCFG, + .ref_ctrl = MT47H128M16RT25E_EMIF_SDREF, + .sdram_tim1 = MT47H128M16RT25E_EMIF_TIM1, + .sdram_tim2 = MT47H128M16RT25E_EMIF_TIM2, + .sdram_tim3 = MT47H128M16RT25E_EMIF_TIM3, + .emif_ddr_phy_ctlr_1 = MT47H128M16RT25E_EMIF_READ_LATENCY, +}; + +#define OSC (V_OSCK/1000000) +const struct dpll_params dpll_ddr = { + 266, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params dpll_ddr_evm_sk = { + 303, OSC-1, 1, -1, -1, -1, -1}; +const struct dpll_params dpll_ddr_bone_black = { + 400, OSC-1, 1, -1, -1, -1, -1}; + +void am33xx_spl_board_init(void) +{ + int mpu_vdd; + int sil_rev; + + /* Get the frequency */ + dpll_mpu_opp100.m = am335x_get_efuse_mpu_max_freq(cdev); + + /* + * The PDU001 (more precisely the computing module m2) uses a + * TPS65910 PMIC. For all MPU frequencies we support we use a CORE + * voltage of 1.1375V. For MPU voltage we need to switch based on + * the frequency we are running at. + */ + if (i2c_probe(TPS65910_CTRL_I2C_ADDR)) + return; + + /* + * Depending on MPU clock and PG we will need a different + * VDD to drive at that speed. + */ + sil_rev = readl(&cdev->deviceid) >> 28; + mpu_vdd = am335x_get_tps65910_mpu_vdd(sil_rev, + dpll_mpu_opp100.m); + + /* Tell the TPS65910 to use i2c */ + tps65910_set_i2c_control(); + + /* First update MPU voltage. */ + if (tps65910_voltage_update(MPU, mpu_vdd)) + return; + + /* Second, update the CORE voltage. */ + if (tps65910_voltage_update(CORE, TPS65910_OP_REG_SEL_1_1_3)) + return; + + /* Set CORE Frequencies to OPP100 */ + do_setup_dpll(&dpll_core_regs, &dpll_core_opp100); + + /* Set MPU Frequency to what we detected now that voltages are set */ + do_setup_dpll(&dpll_mpu_regs, &dpll_mpu_opp100); + + /* save boot device for later use by 'board_late_init' */ + save_boot_device(); +} + +const struct dpll_params *get_dpll_ddr_params(void) +{ + enable_i2c0_pin_mux(); + i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); + + return &dpll_ddr; +} + +void set_uart_mux_conf(void) +{ +#if CONFIG_CONS_INDEX == 1 + enable_uart0_pin_mux(); +#elif CONFIG_CONS_INDEX == 2 + enable_uart1_pin_mux(); +#elif CONFIG_CONS_INDEX == 3 + enable_uart2_pin_mux(); +#elif CONFIG_CONS_INDEX == 4 + enable_uart3_pin_mux(); +#elif CONFIG_CONS_INDEX == 5 + enable_uart4_pin_mux(); +#elif CONFIG_CONS_INDEX == 6 + enable_uart5_pin_mux(); +#endif +} + +void set_mux_conf_regs(void) +{ + enable_board_pin_mux(); +} + +const struct ctrl_ioregs ioregs = { + .cm0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .cm2ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt0ioctl = MT47H128M16RT25E_IOCTRL_VALUE, + .dt1ioctl = MT47H128M16RT25E_IOCTRL_VALUE, +}; + +void sdram_init(void) +{ + config_ddr(266, &ioregs, &ddr2_data, + &ddr2_cmd_ctrl_data, &ddr2_emif_reg_data, 0); +} +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +/* + * Basic board specific setup. Pinmux has been handled already. + */ +int board_init(void) +{ +#ifdef CONFIG_HW_WATCHDOG + hw_watchdog_init(); +#endif + + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; + return 0; +} + +#ifdef CONFIG_BOARD_LATE_INIT +int board_late_init(void) +{ + struct i2c_adapter *adap; + + setenv_boot_device(); + + /* second I2C bus connects to node ID and front panel LED chip */ + adap = I2C_ADAP_NR(1); + adap->init(adap, adap->speed, adap->slaveaddr); + if (adap) { + set_run_led(adap); + setenv_serial(adap); + } + + return 0; +} +#endif diff --git a/board/eets/pdu001/board.h b/board/eets/pdu001/board.h new file mode 100644 index 0000000..6f6947d --- /dev/null +++ b/board/eets/pdu001/board.h @@ -0,0 +1,30 @@ +/* + * board.h + * + * EETS GmbH PDU001 board information header + * + * Copyright (C) 2016 EETS GmbH - http://www.eets.ch/ + * + * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _BOARD_H_ +#define _BOARD_H_ + +/* + * We have three pin mux functions that must exist. We must be able to + * enable uart3, for initial output and i2c0 to access PMIC. We then + * have a main pinmux function that can be overridden to enable all + * other pinmux that is required on the board. + */ +void enable_uart0_pin_mux(void); +void enable_uart1_pin_mux(void); +void enable_uart2_pin_mux(void); +void enable_uart3_pin_mux(void); +void enable_uart4_pin_mux(void); +void enable_uart5_pin_mux(void); +void enable_i2c0_pin_mux(void); +void enable_board_pin_mux(void); +#endif diff --git a/board/eets/pdu001/mux.c b/board/eets/pdu001/mux.c new file mode 100644 index 0000000..06deb7b --- /dev/null +++ b/board/eets/pdu001/mux.c @@ -0,0 +1,146 @@ +/* + * mux.c + * + * Copyright (C) 2016 EETS GmbH - http://www.eets.ch/ + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <asm/arch/sys_proto.h> +#include <asm/arch/hardware.h> +#include <asm/arch/mux.h> +#include <asm/io.h> +#include <i2c.h> +#include "board.h" + +static struct module_pin_mux uart0_pin_mux[] = { + {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */ + {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ + {-1}, +}; + +static struct module_pin_mux uart1_pin_mux[] = { + {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */ + {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ + {-1}, +}; + +static struct module_pin_mux uart2_pin_mux[] = { + {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */ + {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ + {-1}, +}; + +static struct module_pin_mux uart3_pin_mux[] = { + {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */ + {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ + {-1}, +}; + +static struct module_pin_mux uart4_pin_mux[] = { + {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */ + {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ + {-1}, +}; + +static struct module_pin_mux uart5_pin_mux[] = { + {OFFSET(lcd_data9), (MODE(4) | PULLUP_EN | RXACTIVE)}, /* UART5_RXD */ + {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ + {-1}, +}; + +/* 2GB eMMC */ +static struct module_pin_mux mmc0_pin_mux[] = { + {OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT3 */ + {OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT2 */ + {OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT1 */ + {OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_DAT0 */ + {OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CLK */ + {OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* MMC0_CMD */ + {-1}, +}; + +/* SD-Card cage */ +static struct module_pin_mux mmc1_pin_mux[] = { + {OFFSET(gpmc_ad3), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT3 */ + {OFFSET(gpmc_ad2), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT2 */ + {OFFSET(gpmc_ad1), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT1 */ + {OFFSET(gpmc_ad0), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT0 */ + {OFFSET(gpmc_csn1), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CLK */ + {OFFSET(gpmc_csn2), (MODE(2) | RXACTIVE | PULLUP_EN)}, /* MMC1_CMD */ + {OFFSET(gpmc_advn_ale), (MODE(7) | RXACTIVE | + PULLUP_EN | PULLUDDIS)}, /* MMC1_CD */ + {-1}, +}; + +static struct module_pin_mux i2c0_pin_mux[] = { + {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ + {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ + {-1}, +}; + +static struct module_pin_mux i2c1_pin_mux[] = { + {OFFSET(spi0_d1), (MODE(2) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ + {OFFSET(spi0_cs0), (MODE(2) | RXACTIVE | + PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ + {-1}, +}; + +static struct module_pin_mux spi1_pin_mux[] = { + {OFFSET(mcasp0_aclkx), (MODE(3) | RXACTIVE | PULLUDEN)}, /* SPI1_SCLK */ + {OFFSET(mcasp0_fsx), (MODE(3) | RXACTIVE | + PULLUDEN | PULLUP_EN)}, /* SPI1_D0 */ + {OFFSET(mcasp0_axr0), (MODE(3) | RXACTIVE | PULLUDEN)}, /* SPI1_D1 */ + {OFFSET(mcasp0_ahclkr), (MODE(3) | RXACTIVE | + PULLUDEN | PULLUP_EN)}, /* SPI1_CS0 */ + {-1}, +}; + +void enable_uart0_pin_mux(void) +{ + configure_module_pin_mux(uart0_pin_mux); +} + +void enable_uart1_pin_mux(void) +{ + configure_module_pin_mux(uart1_pin_mux); +} + +void enable_uart2_pin_mux(void) +{ + configure_module_pin_mux(uart2_pin_mux); +} + +void enable_uart3_pin_mux(void) +{ + configure_module_pin_mux(uart3_pin_mux); +} + +void enable_uart4_pin_mux(void) +{ + configure_module_pin_mux(uart4_pin_mux); +} + +void enable_uart5_pin_mux(void) +{ + configure_module_pin_mux(uart5_pin_mux); +} + +void enable_i2c0_pin_mux(void) +{ + configure_module_pin_mux(i2c0_pin_mux); +} + +void enable_board_pin_mux(void) +{ + configure_module_pin_mux(mmc0_pin_mux); + configure_module_pin_mux(mmc1_pin_mux); + configure_module_pin_mux(i2c1_pin_mux); + configure_module_pin_mux(spi1_pin_mux); +} diff --git a/configs/pdu001_defconfig b/configs/pdu001_defconfig new file mode 100644 index 0000000..74f1365 --- /dev/null +++ b/configs/pdu001_defconfig @@ -0,0 +1,33 @@ +CONFIG_ARM=y +CONFIG_AM33XX=y +CONFIG_TARGET_PDU001=y +CONFIG_LOCALVERSION="-EETS-1.0.0" +CONFIG_AUTOBOOT_KEYED=y +CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" +CONFIG_AUTOBOOT_STOP_STR=" " +CONFIG_HUSH_PARSER=y +CONFIG_SYS_NS16550=y +CONFIG_OF_LIBFDT=y +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_FAT=y +CONFIG_CMD_I2C=y +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_SPL=y +CONFIG_SPL_STACK_R_ADDR=0x82000000 +CONFIG_SPL_STACK_R=y +CONFIG_SPL_I2C_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_POST_MEM_SUPPORT=y +CONFIG_SPL_RAM_DEVICE=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_FAT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_YMODEM_SUPPORT=y +CONFIG_SPL_MMC_SUPPORT=y diff --git a/include/configs/pdu001.h b/include/configs/pdu001.h new file mode 100644 index 0000000..aae970e --- /dev/null +++ b/include/configs/pdu001.h @@ -0,0 +1,117 @@ +/* + * pdu001.h + * + * Copyright (C) 2016 EETS GmbH - http://www.eets.ch/ + * + * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_PDU001_H +#define __CONFIG_PDU001_H + +#include <configs/ti_am335x_common.h> + +/* Using 32K of volatile storage for environment */ +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x4000 + +/* Things we do not use */ +#undef CONFIG_CMD_SPI +#undef CONFIG_CMD_SAVES +#undef CONFIG_CMD_PART +#undef CONFIG_CMD_EXT2 +#undef CONFIG_CMD_FS_GENERIC +#undef CONFIG_CMD_FS_UUID +#undef CONFIG_CMD_MII +#undef CONFIG_CMD_PING +#undef CONFIG_CMD_DHCP +#undef CONFIG_BOOTP_DNS +#undef CONFIG_BOOTP_DNS2 +#undef CONFIG_BOOTP_SEND_HOSTNAME +#undef CONFIG_BOOTP_GATEWAY +#undef CONFIG_BOOTP_SUBNETMASK +#undef CONFIG_DRIVER_TI_CPSW +#undef CONFIG_MII + +/* Shorten the default boot delay of 2 seconds */ +#undef CONFIG_BOOTDELAY +#define CONFIG_BOOTDELAY 1 + +/* We do not need booting LINUX from SPL */ +#undef CONFIG_SPL_OS_BOOT + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_TIMESTAMP +#endif + +#define MACH_TYPE_PDU001 5075 +#define CONFIG_MACH_TYPE MACH_TYPE_PDU001 +#define CONFIG_BOARD_LATE_INIT + +/* Clock Defines */ +#define V_OSCK 24000000 /* Clock output from T2 */ +#define V_SCLK (V_OSCK) + +#if CONFIG_CONS_INDEX == 1 + #define CONSOLE_DEV "ttyO0" +#elif CONFIG_CONS_INDEX == 2 + #define CONSOLE_DEV "ttyO1" +#elif CONFIG_CONS_INDEX == 3 + #define CONSOLE_DEV "ttyO2" +#elif CONFIG_CONS_INDEX == 4 + #define CONSOLE_DEV "ttyO3" +#elif CONFIG_CONS_INDEX == 5 + #define CONSOLE_DEV "ttyO4" +#elif CONFIG_CONS_INDEX == 6 + #define CONSOLE_DEV "ttyO5" +#endif + +#define CONFIG_BOOTCOMMAND \ + "run eval_boot_device;" \ + "setenv bootargs console=${console} " \ + "root=/dev/mmcblk${mmc_boot}p${root_fs_partition} " \ + "rootfstype=ext4 " \ + "rootwait " \ + "rootdelay=1;" \ + "fatload mmc ${mmc_boot} ${fdtaddr} ${fdtfile};" \ + "fatload mmc ${mmc_boot} ${loadaddr} ${bootfile};" \ + "bootz ${loadaddr} - ${fdtaddr}" + +#ifndef CONFIG_SPL_BUILD +#define CONFIG_EXTRA_ENV_SETTINGS \ + DEFAULT_LINUX_BOOT_ENV \ + "fdtfile=pdu001.dtb\0" \ + "bootfile=zImage\0" \ + "console=" CONSOLE_DEV ",115200n8\0" \ + "root_fs_partition=2\0" \ + "eval_boot_device=" \ + "if test $boot_device = emmc; then " \ + "setenv mmc_boot 0;" \ + "elif test $boot_device = sdcard; then " \ + "setenv mmc_boot 1;" \ + "else " \ + "echo Bootdevice is neither MMC0 nor MMC1;" \ + "reset;" \ + "fi;" \ + "\0" +#endif + +/* NS16550 Configuration */ +#define CONFIG_SYS_NS16550_COM1 0x44e09000 /* UART0 */ +#define CONFIG_SYS_NS16550_COM2 0x48022000 /* UART1 */ +#define CONFIG_SYS_NS16550_COM3 0x48024000 /* UART2 */ +#define CONFIG_SYS_NS16550_COM4 0x481a6000 /* UART3 */ +#define CONFIG_SYS_NS16550_COM5 0x481a8000 /* UART4 */ +#define CONFIG_SYS_NS16550_COM6 0x481aa000 /* UART5 */ +#define CONFIG_BAUDRATE 115200 + +/* PMIC support */ +#define CONFIG_POWER_TPS65910 + +/* SPL */ +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/am33xx/u-boot-spl.lds" + +#endif /* ! __CONFIG_PDU001_H */