This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it.
Cc: Angelo Durgehello angelo.dureghello@timesys.com Cc: TsiChung Liew Tsi-Chung.Liew@nxp.com Signed-off-by: Tom Rini trini@konsulko.com --- arch/m68k/Kconfig | 9 - arch/m68k/cpu/mcf5445x/speed.c | 19 - arch/m68k/dts/M54455EVB.dts | 34 -- arch/m68k/dts/M54455EVB_a66.dts | 34 -- arch/m68k/dts/M54455EVB_i66.dts | 34 -- arch/m68k/dts/M54455EVB_intel.dts | 34 -- arch/m68k/dts/M54455EVB_stm33.dts | 34 -- arch/m68k/dts/Makefile | 5 - arch/m68k/include/asm/immap.h | 7 +- board/freescale/m54455evb/Kconfig | 15 - board/freescale/m54455evb/MAINTAINERS | 10 - board/freescale/m54455evb/Makefile | 7 - board/freescale/m54455evb/README | 407 ---------------------- board/freescale/m54455evb/m54455evb.c | 217 ------------ board/freescale/m54455evb/sbf_dram_init.S | 100 ------ configs/M54455EVB_a66_defconfig | 44 --- configs/M54455EVB_defconfig | 45 --- configs/M54455EVB_i66_defconfig | 44 --- configs/M54455EVB_intel_defconfig | 44 --- configs/M54455EVB_stm33_defconfig | 47 --- include/configs/M54455EVB.h | 356 ------------------- 21 files changed, 2 insertions(+), 1544 deletions(-) delete mode 100644 arch/m68k/dts/M54455EVB.dts delete mode 100644 arch/m68k/dts/M54455EVB_a66.dts delete mode 100644 arch/m68k/dts/M54455EVB_i66.dts delete mode 100644 arch/m68k/dts/M54455EVB_intel.dts delete mode 100644 arch/m68k/dts/M54455EVB_stm33.dts delete mode 100644 board/freescale/m54455evb/Kconfig delete mode 100644 board/freescale/m54455evb/MAINTAINERS delete mode 100644 board/freescale/m54455evb/Makefile delete mode 100644 board/freescale/m54455evb/README delete mode 100644 board/freescale/m54455evb/m54455evb.c delete mode 100644 board/freescale/m54455evb/sbf_dram_init.S delete mode 100644 configs/M54455EVB_a66_defconfig delete mode 100644 configs/M54455EVB_defconfig delete mode 100644 configs/M54455EVB_i66_defconfig delete mode 100644 configs/M54455EVB_intel_defconfig delete mode 100644 configs/M54455EVB_stm33_defconfig delete mode 100644 include/configs/M54455EVB.h
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig index cf45d789d63d..ac20ed230265 100644 --- a/arch/m68k/Kconfig +++ b/arch/m68k/Kconfig @@ -123,10 +123,6 @@ config M54451 bool select MCF5445x
-config M54455 - bool - select MCF5445x - config M52277 bool select MCF5227x @@ -199,10 +195,6 @@ config TARGET_M54451EVB bool "Support M54451EVB" select M54451
-config TARGET_M54455EVB - bool "Support M54455EVB" - select M54455 - config TARGET_AMCORE bool "Support AMCORE" select M5307 @@ -229,7 +221,6 @@ source "board/freescale/m5329evb/Kconfig" source "board/freescale/m5373evb/Kconfig" source "board/freescale/m54418twr/Kconfig" source "board/freescale/m54451evb/Kconfig" -source "board/freescale/m54455evb/Kconfig" source "board/sysam/amcore/Kconfig" source "board/sysam/stmark2/Kconfig"
diff --git a/arch/m68k/cpu/mcf5445x/speed.c b/arch/m68k/cpu/mcf5445x/speed.c index a0b9af8866b3..4809bb49d1cd 100644 --- a/arch/m68k/cpu/mcf5445x/speed.c +++ b/arch/m68k/cpu/mcf5445x/speed.c @@ -141,9 +141,6 @@ void setup_5445x_clocks(void) int bPci; #endif
-#ifdef CONFIG_M54455EVB - u8 *cpld = (u8 *)(CONFIG_SYS_CS2_BASE + 3); -#endif u8 bootmode;
/* To determine PCI is present or not */ @@ -163,22 +160,6 @@ void setup_5445x_clocks(void) #endif }
-#ifdef CONFIG_M54455EVB - bootmode = (in_8(cpld) & 0x03); - - if (bootmode != 3) { - /* Temporary read from CCR- fixed fb issue, must be the same clock - as pci or input clock, causing cpld/fpga read inconsistancy */ - fbtemp = pPllmult[ccm->ccr & fbpll_mask]; - - /* Break down into small pieces, code still in flex bus */ - pcrvalue = in_be32(&pll->pcr) & 0xFFFFF0FF; - temp = fbtemp - 1; - pcrvalue |= PLL_PCR_OUTDIV3(temp); - - out_be32(&pll->pcr, pcrvalue); - } -#endif #ifdef CONFIG_M54451EVB /* No external logic to read the bootmode, hard coded from built */ #ifdef CONFIG_CF_SBF diff --git a/arch/m68k/dts/M54455EVB.dts b/arch/m68k/dts/M54455EVB.dts deleted file mode 100644 index b0ffb5144d8e..000000000000 --- a/arch/m68k/dts/M54455EVB.dts +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Angelo Dureghello angelo@sysam.it - */ - -/dts-v1/; -/include/ "mcf5445x.dtsi" - -/ { - model = "Freescale M54455EVB"; - compatible = "fsl,M54455EVB"; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&uart0 { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&dspi0 { - status = "okay"; -}; - -&fec0 { - status = "okay"; -}; - -&fec1 { - status = "okay"; - mii-base = <0>; -}; diff --git a/arch/m68k/dts/M54455EVB_a66.dts b/arch/m68k/dts/M54455EVB_a66.dts deleted file mode 100644 index c2557bd2e6b3..000000000000 --- a/arch/m68k/dts/M54455EVB_a66.dts +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Angelo Dureghello angelo@sysam.it - */ - -/dts-v1/; -/include/ "mcf5445x.dtsi" - -/ { - model = "Freescale M54455EVB_a66"; - compatible = "fsl,M54455EVB_a66"; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&uart0 { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&dspi0 { - status = "okay"; -}; - -&fec0 { - status = "okay"; -}; - -&fec1 { - status = "okay"; - mii-base = <0>; -}; diff --git a/arch/m68k/dts/M54455EVB_i66.dts b/arch/m68k/dts/M54455EVB_i66.dts deleted file mode 100644 index 3c9161bfae27..000000000000 --- a/arch/m68k/dts/M54455EVB_i66.dts +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Angelo Dureghello angelo@sysam.it - */ - -/dts-v1/; -/include/ "mcf5445x.dtsi" - -/ { - model = "Freescale M54455EVB_i66"; - compatible = "fsl,M54455EVB_i66"; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&uart0 { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&dspi0 { - status = "okay"; -}; - -&fec0 { - status = "okay"; -}; - -&fec1 { - status = "okay"; - mii-base = <0>; -}; diff --git a/arch/m68k/dts/M54455EVB_intel.dts b/arch/m68k/dts/M54455EVB_intel.dts deleted file mode 100644 index 54209d25a70d..000000000000 --- a/arch/m68k/dts/M54455EVB_intel.dts +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Angelo Dureghello angelo@sysam.it - */ - -/dts-v1/; -/include/ "mcf5445x.dtsi" - -/ { - model = "Freescale M54455EVB_intel"; - compatible = "fsl,M5275EVB_intel"; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&uart0 { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&dspi0 { - status = "okay"; -}; - -&fec0 { - status = "okay"; -}; - -&fec1 { - status = "okay"; - mii-base = <0>; -}; diff --git a/arch/m68k/dts/M54455EVB_stm33.dts b/arch/m68k/dts/M54455EVB_stm33.dts deleted file mode 100644 index 701b9a719b4b..000000000000 --- a/arch/m68k/dts/M54455EVB_stm33.dts +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2018 Angelo Dureghello angelo@sysam.it - */ - -/dts-v1/; -/include/ "mcf5445x.dtsi" - -/ { - model = "Freescale M54455EVB_stm33"; - compatible = "fsl,M5275EVB_stm33"; - - chosen { - stdout-path = "serial0:115200n8"; - }; -}; - -&uart0 { - u-boot,dm-pre-reloc; - status = "okay"; -}; - -&dspi0 { - status = "okay"; -}; - -&fec0 { - status = "okay"; -}; - -&fec1 { - status = "okay"; - mii-base = <0>; -}; diff --git a/arch/m68k/dts/Makefile b/arch/m68k/dts/Makefile index 47260a101d8a..15441cdfd387 100644 --- a/arch/m68k/dts/Makefile +++ b/arch/m68k/dts/Makefile @@ -25,11 +25,6 @@ dtb-$(CONFIG_TARGET_M54418TWR) += M54418TWR.dtb \ M54418TWR_nand_rmii_lowfreq.dtb dtb-$(CONFIG_TARGET_M54451EVB) += M54451EVB.dtb \ M54451EVB_stmicro.dtb -dtb-$(CONFIG_TARGET_M54455EVB) += M54455EVB.dtb \ - M54455EVB_intel.dtb \ - M54455EVB_stm33.dtb \ - M54455EVB_a66.dtb \ - M54455EVB_i66.dtb dtb-$(CONFIG_TARGET_AMCORE) += amcore.dtb dtb-$(CONFIG_TARGET_STMARK2) += stmark2.dtb
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h index cabdb0f1a5e0..07d9745b1438 100644 --- a/arch/m68k/include/asm/immap.h +++ b/arch/m68k/include/asm/immap.h @@ -330,14 +330,11 @@
#endif /* CONFIG_M54418 */
-#if defined(CONFIG_M54451) || defined(CONFIG_M54455) +#if defined(CONFIG_M54451) #include <asm/immap_5445x.h> #include <asm/m5445x.h>
#define CONFIG_SYS_FEC0_IOBASE (MMAP_FEC0) -#if defined(CONFIG_M54455EVB) -#define CONFIG_SYS_FEC1_IOBASE (MMAP_FEC1) -#endif
#define CONFIG_SYS_UART_BASE (MMAP_UART0 + (CONFIG_SYS_UART_PORT * 0x4000))
@@ -364,7 +361,7 @@ #define CONFIG_SYS_PCI_TBATR0 (CONFIG_SYS_MBAR) #define CONFIG_SYS_PCI_TBATR5 (CONFIG_SYS_SDRAM_BASE) #endif -#endif /* CONFIG_M54451 || CONFIG_M54455 */ +#endif /* CONFIG_M54451 */
#ifdef CONFIG_M547x #include <asm/immap_547x_8x.h> diff --git a/board/freescale/m54455evb/Kconfig b/board/freescale/m54455evb/Kconfig deleted file mode 100644 index 096bce83121a..000000000000 --- a/board/freescale/m54455evb/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -if TARGET_M54455EVB - -config SYS_CPU - default "mcf5445x" - -config SYS_BOARD - default "m54455evb" - -config SYS_VENDOR - default "freescale" - -config SYS_CONFIG_NAME - default "M54455EVB" - -endif diff --git a/board/freescale/m54455evb/MAINTAINERS b/board/freescale/m54455evb/MAINTAINERS deleted file mode 100644 index 27ced3c7b1fa..000000000000 --- a/board/freescale/m54455evb/MAINTAINERS +++ /dev/null @@ -1,10 +0,0 @@ -M54455EVB BOARD -M: TsiChung Liew Tsi-Chung.Liew@nxp.com -S: Maintained -F: board/freescale/m54455evb/ -F: include/configs/M54455EVB.h -F: configs/M54455EVB_defconfig -F: configs/M54455EVB_a66_defconfig -F: configs/M54455EVB_i66_defconfig -F: configs/M54455EVB_intel_defconfig -F: configs/M54455EVB_stm33_defconfig diff --git a/board/freescale/m54455evb/Makefile b/board/freescale/m54455evb/Makefile deleted file mode 100644 index eff8ab066060..000000000000 --- a/board/freescale/m54455evb/Makefile +++ /dev/null @@ -1,7 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2003 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -obj-y = m54455evb.o -extra-y += sbf_dram_init.o diff --git a/board/freescale/m54455evb/README b/board/freescale/m54455evb/README deleted file mode 100644 index 26d3cc81fd55..000000000000 --- a/board/freescale/m54455evb/README +++ /dev/null @@ -1,407 +0,0 @@ -Freescale MCF54455EVB ColdFire Development Board -================================================ - -TsiChung Liew(Tsi-Chung.Liew@freescale.com) -Created 4/08/07 -=========================================== - - -Changed files: -============== - -- board/freescale/m54455evb/m54455evb.c Dram setup, IDE pre init, and PCI init -- board/freescale/m54455evb/flash.c Atmel and INTEL flash support -- board/freescale/m54455evb/Makefile Makefile -- board/freescale/m54455evb/config.mk config make -- board/freescale/m54455evb/u-boot.lds Linker description - -- common/cmd_bdinfo.c Clock frequencies output -- common/cmd_mii.c mii support - -- arch/m68k/cpu/mcf5445x/cpu.c cpu specific code -- arch/m68k/cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs -- arch/m68k/cpu/mcf5445x/interrupts.c cpu specific interrupt support -- arch/m68k/cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock -- arch/m68k/cpu/mcf5445x/Makefile Makefile -- arch/m68k/cpu/mcf5445x/config.mk config make -- arch/m68k/cpu/mcf5445x/start.S start up assembly code - -- board/freescale/m54455evb/README This readme file - -- drivers/net/mcffec.c ColdFire common FEC driver -- drivers/serial/mcfuart.c ColdFire common UART driver - -- include/asm-m68k/bitops.h Bit operation function export -- include/asm-m68k/byteorder.h Byte order functions -- include/asm-m68k/fec.h FEC structure and definition -- include/asm-m68k/fsl_i2c.h I2C structure and definition -- include/asm-m68k/global_data.h Global data structure -- include/asm-m68k/immap.h ColdFire specific header file and driver macros -- include/asm-m68k/immap_5445x.h mcf5445x specific header file -- include/asm-m68k/io.h io functions -- include/asm-m68k/m5445x.h mcf5445x specific header file -- include/asm-m68k/posix_types.h Posix -- include/asm-m68k/processor.h header file -- include/asm-m68k/ptrace.h Exception structure -- include/asm-m68k/rtc.h Realtime clock header file -- include/asm-m68k/string.h String function export -- include/asm-m68k/timer.h Timer structure and definition -- include/asm-m68k/types.h Data types definition -- include/asm-m68k/uart.h Uart structure and definition -- include/asm-m68k/u-boot.h U-Boot structure - -- include/configs/M54455EVB.h Board specific configuration file - -- arch/m68k/lib/board.c board init function -- arch/m68k/lib/cache.c -- arch/m68k/lib/interrupts Coldfire common interrupt functions -- arch/m68k/lib/m68k_linux.c -- arch/m68k/lib/time.c Timer functions (Dma timer and PIT) -- arch/m68k/lib/traps.c Exception init code - -- rtc/mcfrtc.c Realtime clock Driver - -1 MCF5445x specific Options/Settings -==================================== -1.1 pre-loader is no longer suppoer in thie coldfire family - -1.2 Configuration settings for M54455EVB Development Board -CONFIG_MCF5445x -- define for all MCF5445x CPUs -CONFIG_M54455 -- define for all Freescale MCF54455 CPUs -CONFIG_M54455EVB -- define for M54455EVB board - -CONFIG_MCFUART -- define to use common CF Uart driver -CONFIG_SYS_UART_PORT -- define UART port number, start with 0, 1 and 2 -CONFIG_BAUDRATE -- define UART baudrate - -CONFIG_MCFRTC -- define to use common CF RTC driver -CONFIG_SYS_MCFRTC_BASE -- provide base address for RTC in immap.h -CONFIG_SYS_RTC_OSCILLATOR -- define RTC clock frequency -RTC_DEBUG -- define to show RTC debug message -CONFIG_CMD_DATE -- enable to use date feature in U-Boot - -CONFIG_MCFFEC -- define to use common CF FEC driver -CONFIG_MII -- enable to use MII driver -CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c -CONFIG_SYS_DISCOVER_PHY -- enable PHY discovery -CONFIG_SYS_RX_ETH_BUFFER -- Set FEC Receive buffer -CONFIG_SYS_FAULT_ECHO_LINK_DOWN-- -CONFIG_SYS_FEC0_PINMUX -- Set FEC0 Pin configuration -CONFIG_SYS_FEC1_PINMUX -- Set FEC1 Pin configuration -CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register -CONFIG_SYS_FEC1_MIIBASE -- Set FEC0 MII base register -MCFFEC_TOUT_LOOP -- set FEC timeout loop -CONFIG_HAS_ETH1 -- define to enable second FEC in U-Boot - -CONFIG_ISO_PARTITION -- enable ISO read/write -CONFIG_DOS_PARTITION -- enable DOS read/write -CONFIG_IDE_RESET -- define ide_reset() -CONFIG_IDE_PREINIT -- define ide_preinit() -CONFIG_ATAPI -- define ATAPI support -CONFIG_LBA48 -- define LBA48 (larger than 120GB) support -CONFIG_SYS_IDE_MAXBUS -- define max channel -CONFIG_SYS_IDE_MAXDEVICE -- define max devices per channel -CONFIG_SYS_ATA_BASE_ADDR -- define ATA base address -CONFIG_SYS_ATA_IDE0_OFFSET -- define ATA IDE0 offset -CONFIG_SYS_ATA_DATA_OFFSET -- define ATA data IO -CONFIG_SYS_ATA_REG_OFFSET -- define for normal register accesses -CONFIG_SYS_ATA_ALT_OFFSET -- define for alternate registers -CONFIG_SYS_ATA_STRIDE -- define for Interval between registers -_IO_BASE -- define for IO base address - -CONFIG_MCFTMR -- define to use DMA timer - -CONFIG_SYS_FSL_I2C -- define to use FSL common I2C driver -CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged -CONFIG_SYS_I2C_SPEED -- define for I2C speed -CONFIG_SYS_I2C_SLAVE -- define for I2C slave address -CONFIG_SYS_I2C_OFFSET -- define for I2C base address offset -CONFIG_SYS_IMMR -- define for MBAR offset - -CONFIG_PCI -- define for PCI support -CONFIG_PCI_PNP -- define for Plug n play support -CONFIG_SYS_PCI_MEM_BUS -- PCI memory logical offset -CONFIG_SYS_PCI_MEM_PHYS -- PCI memory physical offset -CONFIG_SYS_PCI_MEM_SIZE -- PCI memory size -CONFIG_SYS_PCI_IO_BUS -- PCI IO logical offset -CONFIG_SYS_PCI_IO_PHYS -- PCI IO physical offset -CONFIG_SYS_PCI_IO_SIZE -- PCI IO size -CONFIG_SYS_PCI_CFG_BUS -- PCI Configuration logical offset -CONFIG_SYS_PCI_CFG_PHYS -- PCI Configuration physical offset -CONFIG_SYS_PCI_CFG_SIZE -- PCI Configuration size - -CONFIG_EXTRA_CLOCK -- Enable extra clock such as vco, flexbus, pci, etc - -CONFIG_SYS_MBAR -- define MBAR offset - -CONFIG_SYS_ATMEL_BOOT -- To determine the U-Boot is booted from Atmel or Intel - -CONFIG_MONITOR_IS_IN_RAM -- Not support - -CONFIG_SYS_INIT_RAM_ADDR -- defines the base address of the MCF54455 internal SRAM - -CONFIG_SYS_CSn_BASE -- defines the Chip Select Base register -CONFIG_SYS_CSn_MASK -- defines the Chip Select Mask register -CONFIG_SYS_CSn_CTRL -- defines the Chip Select Control register - -CONFIG_SYS_ATMEL_BASE -- defines the Atmel Flash base -CONFIG_SYS_INTEL_BASE -- defines the Intel Flash base - -CONFIG_SYS_SDRAM_BASE -- defines the DRAM Base -CONFIG_SYS_SDRAM_BASE1 -- defines the DRAM Base 1 - -2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL -=========================================== -2.1. System memory map: - Flash: 0x00000000-0x3FFFFFFF (1024MB) - DDR: 0x40000000-0x7FFFFFFF (1024MB) - SRAM: 0x80000000-0x8FFFFFFF (256MB) - ATA: 0x90000000-0x9FFFFFFF (256MB) - PCI: 0xA0000000-0xBFFFFFFF (512MB) - FlexBus: 0xC0000000-0xDFFFFFFF (512MB) - IP: 0xF0000000-0xFFFFFFFF (256MB) - -2.2. For the initial bringup, we adopted a consistent memory scheme between U-Boot and - linux kernel, you can customize it based on your system requirements: - Atmel boot: - Flash0: 0x00000000-0x0007FFFF (512KB) - Flash1: 0x04000000-0x05FFFFFF (32MB) - Intel boot: - Flash0: 0x00000000-0x01FFFFFF (32MB) - Flash1: 0x04000000-0x0407FFFF (512KB) - - CPLD: 0x08000000-0x08FFFFFF (16MB) - FPGA: 0x09000000-0x09FFFFFF (16MB) - DDR: 0x40000000-0x4FFFFFFF (256MB) - SRAM: 0x80000000-0x80007FFF (32KB) - IP: 0xFC000000-0xFC0FFFFF (64KB) - -3. SWITCH SETTINGS -================== -3.1 SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL - SW1 Pin4: 0 - ULPI chip not in reset state or 1 - ULPI chip in reset state - SW1 Pin5: 0 - Full ATA Bus enabled, FEC Phy1 powered down - 1 - Upper 8 bits ATA data bus disabled, FEC PHY1 active - SW1 Pin6: 0 - FEC Phy0 active or 1 - FEC Phy0 powered down - SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL - -4. COMPILATION -============== -4.1 To create U-Boot the gcc-4.1-32 compiler set (ColdFire ELF version) -from codesourcery.com was used. Download it from: -http://www.codesourcery.com/gnu_toolchains/coldfire/download.html - -4.2 Compilation - export CROSS_COMPILE=cross-compile-prefix - cd u-boot-1.x.x - make distclean - make M54455EVB_config, or - default to atmel 33Mhz input clock - make M54455EVB_atmel_config, or - default to atmel 33Mhz input clock - make M54455EVB_a33_config, or - default to atmel 33Mhz input clock - make M54455EVB_a66_config, or - default to atmel 66Mhz input clock - make M54455EVB_intel_config, or - default to intel 33Mhz input clock - make M54455EVB_i33_config, or - default to intel 33Mhz input clock - make M54455EVB_i66_config, or - default to intel 66Mhz input clock - make - -5. SCREEN DUMP -============== -5.1 M54455EVB Development board - Boot from Atmel (NOTE: May not show exactly the same) - -U-Boot 1.2.0-g98c80b46-dirty (Jul 26 2007 - 12:44:08) - -CPU: Freescale MCF54455 (Mask:48 Version:1) - CPU CLK 266 Mhz BUS CLK 133 Mhz FLB CLK 66 Mhz - PCI CLK 33 Mhz INP CLK 33 Mhz VCO CLK 533 Mhz -Board: Freescale M54455 EVB -I2C: ready -DRAM: 256 MB -FLASH: 16.5 MB -In: serial -Out: serial -Err: serial -Net: FEC0, FEC1 -IDE: Bus 0: not available --> print -bootargs=root=/dev/ram rw -bootdelay=1 -baudrate=115200 -ethaddr=00:e0:0c:bc:e5:60 -eth1addr=00:e0:0c:bc:e5:61 -hostname=M54455EVB -netdev=eth0 -inpclk=33333333 -loadaddr=40010000 -load=tftp ${loadaddr) ${u-boot} -upd=run load; run prog -prog=prot off 0 2ffff;era 0 2ffff;cp.b ${loadaddr} 0 ${filesize};save -ethact=FEC0 -mtdids=nor0=M54455EVB-1 -mtdparts=M54455EVB-1:16m(user) -u-boot=u-boot54455.bin -filesize=292b4 -fileaddr=40010000 -gatewayip=192.168.1.1 -netmask=255.255.255.0 -ipaddr=192.168.1.3 -serverip=192.168.1.2 -stdin=serial -stdout=serial -stderr=serial -mem=261632k - -Environment size: 563/8188 bytes --> bdinfo -memstart = 0x40000000 -memsize = 0x10000000 -flashstart = 0x00000000 -flashsize = 0x01080000 -flashoffset = 0x00000000 -sramstart = 0x80000000 -sramsize = 0x00008000 -mbar = 0xFC000000 -busfreq = 133.333 MHz -pcifreq = 33.333 MHz -flbfreq = 66.666 MHz -inpfreq = 33.333 MHz -vcofreq = 533.333 MHz -ethaddr = 00:E0:0C:BC:E5:60 -eth1addr = 00:E0:0C:BC:E5:61 -ip_addr = 192.168.1.3 -baudrate = 115200 bps --> --> help -? - alias for 'help' -base - print or set address offset -bdinfo - print Board Info structure -boot - boot default, i.e., run 'bootcmd' -bootd - boot default, i.e., run 'bootcmd' -bootelf - Boot from an ELF image in memory -bootm - boot application image from memory -bootp - boot image via network using BootP/TFTP protocol -bootvx - Boot vxWorks from an ELF image -cmp - memory compare -coninfo - print console devices and information -cp - memory copy -crc32 - checksum calculation -date - get/set/reset date & time -dcache - enable or disable data cache -diskboot- boot from IDE device -echo - echo args to console -erase - erase FLASH memory -ext2load- load binary file from a Ext2 filesystem -ext2ls - list files in a directory (default /) -fatinfo - print information about filesystem -fatload - load binary file from a dos filesystem -fatls - list files in a directory (default /) -flinfo - print FLASH memory information -fsinfo - print information about filesystems -fsload - load binary file from a filesystem image -go - start application at address 'addr' -help - print online help -i2c - I2C sub-system -icache - enable or disable instruction cache -ide - IDE sub-system -iminfo - print header information for application image -imls - list all images found in flash -itest - return true/false on integer compare -loadb - load binary file over serial line (kermit mode) -loads - load S-Record file over serial line -loady - load binary file over serial line (ymodem mode) -loop - infinite loop on address range -ls - list files in a directory (default /) -md - memory display -mii - MII utility commands -mm - memory modify (auto-incrementing) -mtest - simple RAM test -mw - memory write (fill) -nfs - boot image via network using NFS protocol -nm - memory modify (constant address) -pci - list and access PCI Configuration Space -ping - send ICMP ECHO_REQUEST to network host -printenv- print environment variables -protect - enable or disable FLASH write protection -rarpboot- boot image via network using RARP/TFTP protocol -reset - Perform RESET of the CPU -run - run commands in an environment variable -saveenv - save environment variables to persistent storage -setenv - set environment variables -sleep - delay execution for some time -source - run script from memory -tftpboot- boot image via network using TFTP protocol -version - print monitor version -->bootm 4000000 - -## Booting image at 04000000 ... - Image Name: Linux Kernel Image - Created: 2007-08-14 15:13:00 UTC - Image Type: M68K Linux Kernel Image (uncompressed) - Data Size: 2301952 Bytes = 2.2 MB - Load Address: 40020000 - Entry Point: 40020000 - Verifying Checksum ... OK -OK -Linux version 2.6.20-gfe5136d6-dirty (mattw@kea) (gcc version 4.2.0 20070318 (pr -erelease) (Sourcery G++ Lite 4.2-20)) #108 Mon Aug 13 13:00:13 MDT 2007 -starting up linux startmem 0xc0254000, endmem 0xcfffffff, size 253MB -Built 1 zonelists. Total pages: 32624 -Kernel command line: root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=ph -ysmap-flash.0:5M(kernel)ro,-(jffs2) -PID hash table entries: 1024 (order: 10, 4096 bytes) -Console: colour dummy device 80x25 -Dentry cache hash table entries: 32768 (order: 4, 131072 bytes) -Inode-cache hash table entries: 16384 (order: 3, 65536 bytes) -Memory: 257496k/262136k available (1864k kernel code, 2440k data, 88k init) -Mount-cache hash table entries: 1024 -NET: Registered protocol family 16 -SCSI subsystem initialized -NET: Registered protocol family 2 -IP route cache hash table entries: 2048 (order: 0, 8192 bytes) -TCP established hash table entries: 8192 (order: 2, 32768 bytes) -TCP bind hash table entries: 4096 (order: 1, 16384 bytes) -TCP: Hash tables configured (established 8192 bind 4096) -TCP reno registered -JFFS2 version 2.2. (NAND) (C) 2001-2006 Red Hat, Inc. -io scheduler noop registered -io scheduler anticipatory registered -io scheduler deadline registered -io scheduler cfq registered (default) -ColdFire internal UART serial driver version 1.00 -ttyS0 at 0xfc060000 (irq = 90) is a builtin ColdFire UART -ttyS1 at 0xfc064000 (irq = 91) is a builtin ColdFire UART -ttyS2 at 0xfc068000 (irq = 92) is a builtin ColdFire UART -RAMDISK driver initialized: 16 RAM disks of 64000K size 1024 blocksize -loop: loaded (max 8 devices) -FEC ENET Version 0.2 -fec: PHY @ 0x0, ID 0x20005ca2 -- DP83849 -eth0: ethernet 00:08:ee:00:e4:19 -physmap platform flash device: 01000000 at 04000000 -physmap-flash.0: Found 1 x16 devices at 0x0 in 8-bit bank - Intel/Sharp Extended Query Table at 0x0031 -Using buffer write method -cfi_cmdset_0001: Erase suspend on write enabled -2 cmdlinepart partitions found on MTD device physmap-flash.0 -Creating 2 MTD partitions on "physmap-flash.0": -0x00000000-0x00500000 : "kernel" -mtd: Giving out device 0 to kernel -0x00500000-0x01000000 : "jffs2" -mtd: Giving out device 1 to jffs2 -mice: PS/2 mouse device common for all mice -i2c /dev entries driver -TCP cubic registered -NET: Registered protocol family 1 -NET: Registered protocol family 17 -NET: Registered protocol family 15 -VFS: Mounted root (jffs2 filesystem). -Setting the hostname to freescale -Mounting filesystems -mount: Mounting usbfs on /proc/bus/usb failed: No such file or directory -Starting syslogd and klogd -Setting up networking on loopback device: -Setting up networking on eth0: -eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX. -Adding static route for default gateway to 172.27.255.254: -Setting nameserver to 172.27.0.1 in /etc/resolv.conf: -Starting inetd: -/ # diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c deleted file mode 100644 index c749ee407e77..000000000000 --- a/board/freescale/m54455evb/m54455evb.c +++ /dev/null @@ -1,217 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include <common.h> -#include <init.h> -#include <pci.h> -#include <asm/global_data.h> -#include <asm/immap.h> -#include <asm/io.h> -#include <linux/delay.h> - -DECLARE_GLOBAL_DATA_PTR; - -int checkboard(void) -{ - puts("Board: "); - puts("Freescale M54455 EVB\n"); - return 0; -}; - -int dram_init(void) -{ - u32 dramsize; -#ifdef CONFIG_CF_SBF - /* - * Serial Boot: The dram is already initialized in start.S - * only require to return DRAM size - */ - dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000 >> 1; -#else - sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); - gpio_t *gpio = (gpio_t *)(MMAP_GPIO); - u32 i; - - dramsize = CONFIG_SYS_SDRAM_SIZE * 0x100000 >> 1; - - for (i = 0x13; i < 0x20; i++) { - if (dramsize == (1 << i)) - break; - } - i--; - - out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH); - - out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i); - out_be32(&sdram->sdcs1, CONFIG_SYS_SDRAM_BASE1 | i); - - out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1); - out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2); - - /* Issue PALL */ - out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); - - /* Issue LEMR */ - out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD | 0x408); - out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE | 0x300); - - udelay(500); - - /* Issue PALL */ - out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); - - /* Perform two refresh cycles */ - out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); - out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); - - out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE | 0x200); - - out_be32(&sdram->sdcr, - (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000c00); - - udelay(100); -#endif - gd->ram_size = dramsize << 1; - - return 0; -}; - -int testdram(void) -{ - /* TODO: XXX XXX XXX */ - printf("DRAM test not implemented!\n"); - - return (0); -} - -#if defined(CONFIG_IDE) -#include <ata.h> - -int ide_preinit(void) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - u32 tmp; - - tmp = (in_8(&gpio->par_fec) & GPIO_PAR_FEC_FEC1_UNMASK) | 0x10; - setbits_8(&gpio->par_fec, tmp); - tmp = ((in_be16(&gpio->par_feci2c) & 0xf0ff) | - (GPIO_PAR_FECI2C_MDC1_ATA_DIOR | GPIO_PAR_FECI2C_MDIO1_ATA_DIOW)); - setbits_be16(&gpio->par_feci2c, tmp); - - setbits_be16(&gpio->par_ata, - GPIO_PAR_ATA_BUFEN | GPIO_PAR_ATA_CS1 | GPIO_PAR_ATA_CS0 | - GPIO_PAR_ATA_DA2 | GPIO_PAR_ATA_DA1 | GPIO_PAR_ATA_DA0 | - GPIO_PAR_ATA_RESET_RESET | GPIO_PAR_ATA_DMARQ_DMARQ | - GPIO_PAR_ATA_IORDY_IORDY); - setbits_be16(&gpio->par_pci, - GPIO_PAR_PCI_GNT3_ATA_DMACK | GPIO_PAR_PCI_REQ3_ATA_INTRQ); - - return (0); -} - -void ide_set_reset(int idereset) -{ - atac_t *ata = (atac_t *) MMAP_ATA; - long period; - /* t1, t2, t3, t4, t5, t6, t9, tRD, tA */ - int piotms[5][9] = { - {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */ - {50, 125, 45, 20, 35, 5, 15, 0, 35}, /* PIO 1 */ - {30, 100, 30, 15, 20, 5, 10, 0, 35}, /* PIO 2 */ - {30, 80, 30, 10, 20, 5, 10, 0, 35}, /* PIO 3 */ - {25, 70, 20, 10, 20, 5, 10, 0, 35} - }; /* PIO 4 */ - - if (idereset) { - /* control reset */ - out_8(&ata->cr, 0); - udelay(10000); - } else { -#define CALC_TIMING(t) (t + period - 1) / period - period = 1000000000 / gd->bus_clk; /* period in ns */ - - /*ata->ton = CALC_TIMING (180); */ - out_8(&ata->t1, CALC_TIMING(piotms[2][0])); - out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); - out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); - out_8(&ata->ta, CALC_TIMING(piotms[2][8])); - out_8(&ata->trd, CALC_TIMING(piotms[2][7])); - out_8(&ata->t4, CALC_TIMING(piotms[2][3])); - out_8(&ata->t9, CALC_TIMING(piotms[2][6])); - - /* IORDY enable */ - out_8(&ata->cr, 0x40); - udelay(200000); - /* IORDY enable */ - setbits_8(&ata->cr, 0x01); - } -} -#endif - -#if defined(CONFIG_PCI) -/* - * Initialize PCI devices, report devices found. - */ -static struct pci_controller hose; -extern void pci_mcf5445x_init(struct pci_controller *hose); - -void pci_init_board(void) -{ - pci_mcf5445x_init(&hose); -} -#endif /* CONFIG_PCI */ - -#if defined(CONFIG_FLASH_CFI_LEGACY) -#include <flash.h> -ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t * info) -{ - int sect[] = CONFIG_SYS_ATMEL_SECT; - int sectsz[] = CONFIG_SYS_ATMEL_SECTSZ; - int i, j, k; - - if (base != CONFIG_SYS_ATMEL_BASE) - return 0; - - info->flash_id = 0x01000000; - info->portwidth = 1; - info->chipwidth = 1; - info->buffer_size = 1; - info->erase_blk_tout = 16384; - info->write_tout = 2; - info->buffer_write_tout = 5; - info->vendor = 0xFFF0; /* CFI_CMDSET_AMD_LEGACY */ - info->cmd_reset = 0x00F0; - info->interface = FLASH_CFI_X8; - info->legacy_unlock = 0; - info->manufacturer_id = (u16) ATM_MANUFACT; - info->device_id = ATM_ID_LV040; - info->device_id2 = 0; - - info->ext_addr = 0; - info->cfi_version = 0x3133; - info->cfi_offset = 0x0000; - info->addr_unlock1 = 0x00000555; - info->addr_unlock2 = 0x000002AA; - info->name = "CFI conformant"; - - info->size = 0; - info->sector_count = CONFIG_SYS_ATMEL_TOTALSECT; - info->start[0] = base; - for (k = 0, i = 0; i < CONFIG_SYS_ATMEL_REGION; i++) { - info->size += sect[i] * sectsz[i]; - - for (j = 0; j < sect[i]; j++, k++) { - info->start[k + 1] = info->start[k] + sectsz[i]; - info->protect[k] = 0; - } - } - - return 1; -} -#endif /* CONFIG_SYS_FLASH_CFI */ diff --git a/board/freescale/m54455evb/sbf_dram_init.S b/board/freescale/m54455evb/sbf_dram_init.S deleted file mode 100644 index fe5bb05ddc9a..000000000000 --- a/board/freescale/m54455evb/sbf_dram_init.S +++ /dev/null @@ -1,100 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Board-specific sbf ddr/sdram init. - * - * (C) Copyright 2017 Angelo Dureghello angelo@sysam.it - */ - - #include <config.h> - -.global sbf_dram_init -.text - -sbf_dram_init: - /* Dram Initialization a1, a2, and d0 */ - /* mscr sdram */ - move.l #0xFC0A4074, %a1 - move.b #(CONFIG_SYS_SDRAM_DRV_STRENGTH), (%a1) - nop - - /* SDRAM Chip 0 and 1 */ - move.l #0xFC0B8110, %a1 - move.l #0xFC0B8114, %a2 - - /* calculate the size */ - move.l #0x13, %d1 - move.l #(CONFIG_SYS_SDRAM_SIZE), %d2 -#ifdef CONFIG_SYS_SDRAM_BASE1 - lsr.l #1, %d2 -#endif - -dramsz_loop: - lsr.l #1, %d2 - add.l #1, %d1 - cmp.l #1, %d2 - bne dramsz_loop -#ifdef CONFIG_SYS_NAND_BOOT - beq asm_nand_chk_status -#endif - /* SDRAM Chip 0 and 1 */ - move.l #(CONFIG_SYS_SDRAM_BASE), (%a1) - or.l %d1, (%a1) -#ifdef CONFIG_SYS_SDRAM_BASE1 - move.l #(CONFIG_SYS_SDRAM_BASE1), (%a2) - or.l %d1, (%a2) -#endif - nop - - /* dram cfg1 and cfg2 */ - move.l #0xFC0B8008, %a1 - move.l #(CONFIG_SYS_SDRAM_CFG1), (%a1) - nop - move.l #0xFC0B800C, %a2 - move.l #(CONFIG_SYS_SDRAM_CFG2), (%a2) - nop - - move.l #0xFC0B8000, %a1 /* Mode */ - move.l #0xFC0B8004, %a2 /* Ctrl */ - - /* Issue PALL */ - move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) - nop - - /* Issue LEMR */ - move.l #(CONFIG_SYS_SDRAM_EMOD + 0x408), (%a1) - nop - move.l #(CONFIG_SYS_SDRAM_MODE + 0x300), (%a1) - nop - - move.l #1000, %d1 - bsr asm_delay - - /* Issue PALL */ - move.l #(CONFIG_SYS_SDRAM_CTRL + 2), (%a2) - nop - - /* Perform two refresh cycles */ - move.l #(CONFIG_SYS_SDRAM_CTRL + 4), %d0 - nop - move.l %d0, (%a2) - move.l %d0, (%a2) - nop - - move.l #(CONFIG_SYS_SDRAM_MODE + 0x200), (%a1) - nop - - move.l #500, %d1 - bsr asm_delay - - move.l #(CONFIG_SYS_SDRAM_CTRL), %d1 - and.l #0x7FFFFFFF, %d1 - - or.l #0x10000C00, %d1 - - move.l %d1, (%a2) - nop - - move.l #2000, %d1 - bsr asm_delay - - rts diff --git a/configs/M54455EVB_a66_defconfig b/configs/M54455EVB_a66_defconfig deleted file mode 100644 index 50bdb2c0cce3..000000000000 --- a/configs/M54455EVB_a66_defconfig +++ /dev/null @@ -1,44 +0,0 @@ -CONFIG_M68K=y -CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_a66" -CONFIG_TARGET_M54455EVB=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=66666666" -CONFIG_BOOTDELAY=1 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -CONFIG_CMD_IMLS=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y -CONFIG_ISO_PARTITION=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0x4040000 -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DM_ETH=y -CONFIG_MCFFEC=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_defconfig b/configs/M54455EVB_defconfig deleted file mode 100644 index 40d025f66eaf..000000000000 --- a/configs/M54455EVB_defconfig +++ /dev/null @@ -1,45 +0,0 @@ -CONFIG_M68K=y -CONFIG_SYS_TEXT_BASE=0x4000000 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="M54455EVB" -CONFIG_TARGET_M54455EVB=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_ATMEL_BOOT,SYS_INPUT_CLKSRC=33333333" -CONFIG_BOOTDELAY=1 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -CONFIG_SYS_PROMPT="-> " -CONFIG_CMD_IMLS=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y -CONFIG_ISO_PARTITION=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0x4040000 -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DM_ETH=y -CONFIG_MCFFEC=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_i66_defconfig b/configs/M54455EVB_i66_defconfig deleted file mode 100644 index 97d5d15ad65b..000000000000 --- a/configs/M54455EVB_i66_defconfig +++ /dev/null @@ -1,44 +0,0 @@ -CONFIG_M68K=y -CONFIG_SYS_TEXT_BASE=0x0 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_i66" -CONFIG_TARGET_M54455EVB=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=66666666" -CONFIG_BOOTDELAY=1 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -CONFIG_CMD_IMLS=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y -CONFIG_ISO_PARTITION=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0x40000 -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DM_ETH=y -CONFIG_MCFFEC=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_intel_defconfig b/configs/M54455EVB_intel_defconfig deleted file mode 100644 index d82f091fea33..000000000000 --- a/configs/M54455EVB_intel_defconfig +++ /dev/null @@ -1,44 +0,0 @@ -CONFIG_M68K=y -CONFIG_SYS_TEXT_BASE=0x0 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_SECT_SIZE=0x20000 -CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_intel" -CONFIG_TARGET_M54455EVB=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_INTEL_BOOT,SYS_INPUT_CLKSRC=33333333" -CONFIG_BOOTDELAY=1 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -CONFIG_CMD_IMLS=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y -CONFIG_ISO_PARTITION=y -CONFIG_ENV_IS_IN_FLASH=y -CONFIG_ENV_ADDR=0x40000 -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DM_ETH=y -CONFIG_MCFFEC=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CF_SPI=y diff --git a/configs/M54455EVB_stm33_defconfig b/configs/M54455EVB_stm33_defconfig deleted file mode 100644 index 147d87e87894..000000000000 --- a/configs/M54455EVB_stm33_defconfig +++ /dev/null @@ -1,47 +0,0 @@ -CONFIG_M68K=y -CONFIG_SYS_TEXT_BASE=0x4FE00000 -CONFIG_ENV_SIZE=0x2000 -CONFIG_ENV_OFFSET=0x30000 -CONFIG_ENV_SECT_SIZE=0x10000 -CONFIG_DEFAULT_DEVICE_TREE="M54455EVB_stm33" -CONFIG_TARGET_M54455EVB=y -CONFIG_SYS_EXTRA_OPTIONS="SYS_STMICRO_BOOT,CF_SBF,SYS_INPUT_CLKSRC=33333333" -CONFIG_BOOTDELAY=1 -CONFIG_USE_BOOTARGS=y -CONFIG_BOOTARGS="root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)" -# CONFIG_CMDLINE_EDITING is not set -# CONFIG_AUTO_COMPLETE is not set -CONFIG_CMD_IMLS=y -CONFIG_CMD_IDE=y -CONFIG_CMD_I2C=y -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_SF=y -CONFIG_CMD_SPI=y -# CONFIG_CMD_SETEXPR is not set -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y -CONFIG_CMD_CACHE=y -CONFIG_CMD_DATE=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_FAT=y -CONFIG_CMD_JFFS2=y -CONFIG_ISO_PARTITION=y -CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_USE_ENV_SPI_CS=y -CONFIG_ENV_SPI_CS=1 -CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_MTD_NOR_FLASH=y -CONFIG_FLASH_CFI_DRIVER=y -CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y -CONFIG_SYS_FLASH_PROTECTION=y -CONFIG_SYS_FLASH_CFI=y -CONFIG_SPI_FLASH=y -CONFIG_SPI_FLASH_STMICRO=y -CONFIG_DM_ETH=y -CONFIG_MCFFEC=y -CONFIG_MII=y -CONFIG_SPI=y -CONFIG_DM_SPI=y -CONFIG_CF_SPI=y diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h deleted file mode 100644 index f3621d6326ef..000000000000 --- a/include/configs/M54455EVB.h +++ /dev/null @@ -1,356 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Freescale MCF54455 EVB board. - * - * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef _M54455EVB_H -#define _M54455EVB_H - -#include <linux/stringify.h> - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_M54455EVB /* M54455EVB board */ - -#define CONFIG_MCFUART -#define CONFIG_SYS_UART_PORT (0) - -#define LDS_BOARD_TEXT board/freescale/m54455evb/sbf_dram_init.o (.text*) - -#undef CONFIG_WATCHDOG - -#define CONFIG_TIMESTAMP /* Print image info with timestamp */ - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE - -/* Network configuration */ -#ifdef CONFIG_MCFFEC -# define CONFIG_MII_INIT 1 -# define CONFIG_SYS_DISCOVER_PHY -# define CONFIG_SYS_RX_ETH_BUFFER 8 -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_HAS_ETH1 -# define CONFIG_ETHPRIME "FEC0" -# define CONFIG_IPADDR 192.162.1.2 -# define CONFIG_NETMASK 255.255.255.0 -# define CONFIG_SERVERIP 192.162.1.1 -# define CONFIG_GATEWAYIP 192.162.1.1 - -/* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */ -# ifndef CONFIG_SYS_DISCOVER_PHY -# define FECDUPLEX FULL -# define FECSPEED _100BASET -# else -# ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN -# endif -# endif /* CONFIG_SYS_DISCOVER_PHY */ -#endif - -#define CONFIG_HOSTNAME "M54455EVB" -#ifdef CONFIG_SYS_STMICRO_BOOT -/* ST Micro serial flash */ -#define CONFIG_SYS_LOAD_ADDR2 0x40010013 -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ - "loadaddr=0x40010000\0" \ - "sbfhdr=sbfhdr.bin\0" \ - "uboot=u-boot.bin\0" \ - "load=tftp ${loadaddr} ${sbfhdr};" \ - "tftp " __stringify(CONFIG_SYS_LOAD_ADDR2) " ${uboot} \0" \ - "upd=run load; run prog\0" \ - "prog=sf probe 0:1 1000000 3;" \ - "sf erase 0 30000;" \ - "sf write ${loadaddr} 0 0x30000;" \ - "save\0" \ - "" -#else -/* Atmel and Intel */ -#ifdef CONFIG_SYS_ATMEL_BOOT -# define CONFIG_SYS_UBOOT_END 0x0403FFFF -#elif defined(CONFIG_SYS_INTEL_BOOT) -# define CONFIG_SYS_UBOOT_END 0x3FFFF -#endif -#define CONFIG_EXTRA_ENV_SETTINGS \ - "netdev=eth0\0" \ - "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \ - "loadaddr=0x40010000\0" \ - "uboot=u-boot.bin\0" \ - "load=tftp ${loadaddr} ${uboot}\0" \ - "upd=run load; run prog\0" \ - "prog=prot off " __stringify(CONFIG_SYS_FLASH_BASE) \ - " " __stringify(CONFIG_SYS_UBOOT_END) ";" \ - "era " __stringify(CONFIG_SYS_FLASH_BASE) " " \ - __stringify(CONFIG_SYS_UBOOT_END) ";" \ - "cp.b ${loadaddr} " __stringify(CONFIG_SYS_FLASH_BASE) \ - " ${filesize}; save\0" \ - "" -#endif - -/* ATA configuration */ -#define CONFIG_IDE_RESET 1 -#define CONFIG_IDE_PREINIT 1 -#define CONFIG_ATAPI -#undef CONFIG_LBA48 - -#define CONFIG_SYS_IDE_MAXBUS 1 -#define CONFIG_SYS_IDE_MAXDEVICE 2 - -#define CONFIG_SYS_ATA_BASE_ADDR 0x90000000 -#define CONFIG_SYS_ATA_IDE0_OFFSET 0 - -#define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */ -#define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */ -#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */ -#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */ - -/* Realtime clock */ -#define CONFIG_MCFRTC -#undef RTC_DEBUG -#define CONFIG_SYS_RTC_OSCILLATOR (32 * CONFIG_SYS_HZ) - -/* Timer */ -#define CONFIG_MCFTMR - -/* I2c */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_FSL -#define CONFIG_SYS_FSL_I2C_SPEED 80000 -#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F -#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 -#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR - -/* DSPI and Serial Flash */ -#define CONFIG_CF_DSPI -#define CONFIG_SYS_SBFHDR_SIZE 0x13 - -/* PCI */ -#ifdef CONFIG_CMD_PCI -#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1 - -#define CONFIG_SYS_PCI_CACHE_LINE_SIZE 4 - -#define CONFIG_SYS_PCI_MEM_BUS 0xA0000000 -#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BUS -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 - -#define CONFIG_SYS_PCI_IO_BUS 0xB1000000 -#define CONFIG_SYS_PCI_IO_PHYS CONFIG_SYS_PCI_IO_BUS -#define CONFIG_SYS_PCI_IO_SIZE 0x01000000 - -#define CONFIG_SYS_PCI_CFG_BUS 0xB0000000 -#define CONFIG_SYS_PCI_CFG_PHYS CONFIG_SYS_PCI_CFG_BUS -#define CONFIG_SYS_PCI_CFG_SIZE 0x01000000 -#endif - -/* FPGA - Spartan 2 */ -/* experiment -#define CONFIG_FPGA_COUNT 1 -#define CONFIG_SYS_FPGA_PROG_FEEDBACK -#define CONFIG_SYS_FPGA_CHECK_CTRLC -*/ - -/* Input, PCI, Flexbus, and VCO */ -#define CONFIG_EXTRA_CLOCK - -#define CONFIG_PRAM 2048 /* 2048 KB */ - -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x10000) - -#define CONFIG_SYS_MBAR 0xFC000000 - -/* - * Low Level Configuration Settings - * (address mappings, register initial values, etc.) - * You should know what you are doing if you make changes here. - */ - -/*----------------------------------------------------------------------- - * Definitions for initial stack pointer and data area (in DPRAM) - */ -#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* Size of used area in internal SRAM */ -#define CONFIG_SYS_INIT_RAM_CTRL 0x221 -#define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 32) -#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_SBFHDR_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - 32) - -/*----------------------------------------------------------------------- - * Start addresses for the final memory configuration - * (Set up by the startup code) - * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 - */ -#define CONFIG_SYS_SDRAM_BASE 0x40000000 -#define CONFIG_SYS_SDRAM_BASE1 0x48000000 -#define CONFIG_SYS_SDRAM_SIZE 256 /* SDRAM size in MB */ -#define CONFIG_SYS_SDRAM_CFG1 0x65311610 -#define CONFIG_SYS_SDRAM_CFG2 0x59670000 -#define CONFIG_SYS_SDRAM_CTRL 0xEA0B2000 -#define CONFIG_SYS_SDRAM_EMOD 0x40010000 -#define CONFIG_SYS_SDRAM_MODE 0x00010033 -#define CONFIG_SYS_SDRAM_DRV_STRENGTH 0xAA - -#ifdef CONFIG_CF_SBF -# define CONFIG_SERIAL_BOOT -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_TEXT_BASE + 0x400) -#else -# define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) -#endif -#define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 -#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ - -/* Reserve 256 kB for malloc() */ -#define CONFIG_SYS_MALLOC_LEN (256 << 10) - -/* - * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization ?? - */ -/* Initial Memory map for Linux */ -#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20)) - -/* - * Configuration for environment - * Environment is not embedded in u-boot. First time runing may have env - * crc error warning if there is no correct environment on the flash. - */ - -/*----------------------------------------------------------------------- - * FLASH organization - */ -#ifdef CONFIG_SYS_STMICRO_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS1_BASE -#endif -#ifdef CONFIG_SYS_ATMEL_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS1_BASE -#endif -#ifdef CONFIG_SYS_INTEL_BOOT -# define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH0_BASE CONFIG_SYS_CS0_BASE -# define CONFIG_SYS_FLASH1_BASE CONFIG_SYS_CS1_BASE -#endif - -#ifdef CONFIG_SYS_FLASH_CFI - -# define CONFIG_SYS_FLASH_SIZE 0x1000000 /* Max size that the board might have */ -# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT -# define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of memory banks */ -# define CONFIG_SYS_MAX_FLASH_SECT 137 /* max number of sectors on one chip */ -# define CONFIG_SYS_FLASH_CHECKSUM -# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_CS0_BASE, CONFIG_SYS_CS1_BASE } -# define CONFIG_FLASH_CFI_LEGACY - -#ifdef CONFIG_FLASH_CFI_LEGACY -# define CONFIG_SYS_ATMEL_REGION 4 -# define CONFIG_SYS_ATMEL_TOTALSECT 11 -# define CONFIG_SYS_ATMEL_SECT {1, 2, 1, 7} -# define CONFIG_SYS_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000} -#endif -#endif - -/* - * This is setting for JFFS2 support in u-boot. - * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. - */ -#ifdef CONFIG_CMD_JFFS2 -#ifdef CF_STMICRO_BOOT -# define CONFIG_JFFS2_DEV "nor1" -# define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH2_BASE + 0x500000) -#endif -#ifdef CONFIG_SYS_ATMEL_BOOT -# define CONFIG_JFFS2_DEV "nor1" -# define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH1_BASE + 0x500000) -#endif -#ifdef CONFIG_SYS_INTEL_BOOT -# define CONFIG_JFFS2_DEV "nor0" -# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) -# define CONFIG_JFFS2_PART_OFFSET (CONFIG_SYS_FLASH0_BASE + 0x500000) -#endif -#endif - -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_CACHELINE_SIZE 16 - -#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 8) -#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ - CONFIG_SYS_INIT_RAM_SIZE - 4) -#define CONFIG_SYS_ICACHE_INV (CF_CACR_BCINVA + CF_CACR_ICINVA) -#define CONFIG_SYS_DCACHE_INV (CF_CACR_DCINVA) -#define CONFIG_SYS_CACHE_ACR2 (CONFIG_SYS_SDRAM_BASE | \ - CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ - CF_ACR_EN | CF_ACR_SM_ALL) -#define CONFIG_SYS_CACHE_ICACR (CF_CACR_BEC | CF_CACR_IEC | \ - CF_CACR_ICINVA | CF_CACR_EUSP) -#define CONFIG_SYS_CACHE_DCACR ((CONFIG_SYS_CACHE_ICACR | \ - CF_CACR_DEC | CF_CACR_DDCM_P | \ - CF_CACR_DCINVA) & ~CF_CACR_ICINVA) - -/*----------------------------------------------------------------------- - * Memory bank definitions - */ -/* - * CS0 - NOR Flash 1, 2, 4, or 8MB - * CS1 - CompactFlash and registers - * CS2 - CPLD - * CS3 - FPGA - * CS4 - Available - * CS5 - Available - */ - -#if defined(CONFIG_SYS_ATMEL_BOOT) || defined(CONFIG_SYS_STMICRO_BOOT) - /* Atmel Flash */ -#define CONFIG_SYS_CS0_BASE 0x04000000 -#define CONFIG_SYS_CS0_MASK 0x00070001 -#define CONFIG_SYS_CS0_CTRL 0x00001140 -/* Intel Flash */ -#define CONFIG_SYS_CS1_BASE 0x00000000 -#define CONFIG_SYS_CS1_MASK 0x01FF0001 -#define CONFIG_SYS_CS1_CTRL 0x00000D60 - -#define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_CS0_BASE -#else -/* Intel Flash */ -#define CONFIG_SYS_CS0_BASE 0x00000000 -#define CONFIG_SYS_CS0_MASK 0x01FF0001 -#define CONFIG_SYS_CS0_CTRL 0x00000D60 - /* Atmel Flash */ -#define CONFIG_SYS_CS1_BASE 0x04000000 -#define CONFIG_SYS_CS1_MASK 0x00070001 -#define CONFIG_SYS_CS1_CTRL 0x00001140 - -#define CONFIG_SYS_ATMEL_BASE CONFIG_SYS_CS1_BASE -#endif - -/* CPLD */ -#define CONFIG_SYS_CS2_BASE 0x08000000 -#define CONFIG_SYS_CS2_MASK 0x00070001 -#define CONFIG_SYS_CS2_CTRL 0x003f1140 - -/* FPGA */ -#define CONFIG_SYS_CS3_BASE 0x09000000 -#define CONFIG_SYS_CS3_MASK 0x00070001 -#define CONFIG_SYS_CS3_CTRL 0x00000020 - -#endif /* _M54455EVB_H */