
6 Oct
2012
6 Oct
'12
12:32 p.m.
From: Liu Ying Ying.Liu@freescale.com
This patch checks self-clear sw_ipu_rst bit in SCR register of SRC controller to be cleared after setting it to high to reset IPUv3. This makes sure that IPUv3 finishes sofware reset.
Signed-off-by: Liu Ying Ying.Liu@freescale.com --- drivers/video/ipu_common.c | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/drivers/video/ipu_common.c b/drivers/video/ipu_common.c index 2020da9..03b7382 100644 --- a/drivers/video/ipu_common.c +++ b/drivers/video/ipu_common.c @@ -397,6 +397,9 @@ void ipu_reset(void) value = __raw_readl(reg); value = value | SW_IPU_RST; __raw_writel(value, reg); + + while (__raw_readl(reg) & SW_IPU_RST) + ; }
/*
--
1.7.1