Hi Bin,
On Wed, 5 May 2021 at 19:42, Bin Meng bmeng.cn@gmail.com wrote:
Hi Simon,
On Thu, May 6, 2021 at 7:37 AM Simon Glass sjg@chromium.org wrote:
Hi Bin,
On Wed, 5 May 2021 at 08:16, Bin Meng bmeng.cn@gmail.com wrote:
This series updates binman to handle creation of u-boot.itb image for RISC-V SiFive Unleashed board.
QEMU RISC-V remains unchanged, as binman uses a dtb to describe the image format, but for QEMU RISC-V there is no dtb as dtb is passed to U-Boot via CONFIG_OF_PRIOR_STAGE.
That's odd. What software is providing the DTB? Not SPL?
QEMU itself creates DTB on the fly, based on command parameters passed to QEMU. The DTB address will be passed to U-Boot by QEMU.
OK. So the canonical DTB is in qemu? Then I think we need at least something in the U-Boot tree too, as you have done.
Not sure how such use case could be properly supported by binman?
Perhaps by adding a .dts file in U-Boot, or making it available manually in some hacky way.
I will see if I can do some hacky way :( Not sure if it brings any improvements compared to current CONFIG_SPL_FIT_GENERATOR scripts.
We should drop these scripts and use binman, as your patch does.
Regards, Simon