On 07/31/2015 08:12 AM, York Sun wrote:
On 07/31/2015 01:39 AM, Aneesh Bansal wrote:
Secure Boot Target is added for NAND for P3041. Changes: In PowerPC, the core begins execution from address 0xFFFFFFFC. In case of secure boot, this default address maps to Boot ROM. The Boot ROM code requires that the bootloader(U-boot) must lie in 0 to 3.5G address space i.e. 0x0 - 0xDFFFFFFF.
In case of NAND Secure Boot, CONFIG_SYS_RAMBOOT is enabled and CPC is configured as SRAM. U-Boot binary will be located on SRAM configured at address 0xBFF00000. In the U-Boot code, TLB entries are created to map the virtual address 0xFFF00000 to physical address 0xBFF00000 of CPC configured as SRAM.
Signed-off-by: Aneesh Bansal aneesh.bansal@freescale.com
Changes in v8: New Patchset Created
This change log doesn't have anything. Please put meaningful log for future patches. You can try to use patman to ease the process.
Actually this new version doesn't change _ANYTHING_, except adding a new patch to this set which should be separated anyway. Please do not send patches like these.
York