Re: [U-Boot] [U-Boot, U-boot, v2] ARM: keystone: ddr3: workaround for ddr3a/3b memory issue

On Wed, Sep 10, 2014 at 03:54:59PM +0300, Khoronzhuk, Ivan wrote:

From: Murali Karicheri m-karicheri2@ti.com

This patch implements a workaround to fix DDR3 memory issue. The code for workaround detects PGSR0 errors and then preps for and executes a software-controlled hard reset.In board_early_init, where logic has been added to identify whether or not the previous reset was a PORz. PLL initialization is skipped in the case of a software-controlled hard reset.

Signed-off-by: Murali Karicheri m-karicheri2@ti.com Signed-off-by: Keegan Garcia kgarcia@ti.com Signed-off-by: Ivan Khoronzhuk ivan.khoronzhuk@ti.com

Applied to u-boot-ti/master, thanks!