For the TS-7800, the FPGA contains a bootloader which handles the SDRAM initialization and loads a bootloader from RAM. We should not try to initialize RAM again while running from it.
Signed-off-by: Michael Spang mspang@csclub.uwaterloo.ca --- arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S | 4 ++++ 1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S index 0523bd4..37d7d14 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S +++ b/arch/arm/cpu/arm926ejs/orion5x/lowlevel_init.S @@ -86,6 +86,8 @@
lowlevel_init:
+#ifndef CONFIG_SKIP_SDRAM_INIT + /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE
@@ -289,5 +291,7 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484]
+#endif + /* Return to U-boot via saved link register */ mov pc, lr