5 Mar
2012
5 Mar
'12
9:19 p.m.
Dear Marek Vasut,
In message 201203052106.42334.marex@denx.de you wrote:
Dear Eric Nelson,
ensure that transmit and receive buffers are cache-line aligned invalidate cache after each packet received flush cache before transmitting
Original patch by Marek: http://lists.denx.de/pipermail/u-boot/2012-February/117695.html
Would be cool to Cc me :-p
Actually this should happen automatically, because your Signed-off-by: line shouldbe there ??
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
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