[U-Boot] [PATCH v2 09/23] apalis_imx6: migrate i2c to using driver model

8 Feb 2019

From: Marcel Ziswiler marcel.ziswiler@toradex.com
Migrate I2C to using driver model.
Signed-off-by: Marcel Ziswiler marcel.ziswiler@toradex.com
---
Changes in v2:
- Also update copyright year in PMIC header file.
- And drop compiler.h include.
board/toradex/apalis_imx6/apalis_imx6.c | 88 +------------------------
 board/toradex/apalis_imx6/pf0100.c      | 59 ++++++++---------
 board/toradex/apalis_imx6/pf0100.h      |  2 +-
 configs/apalis_imx6_defconfig           |  1 +
 include/configs/apalis_imx6.h           |  8 +--
 5 files changed, 36 insertions(+), 122 deletions(-)

diff --git a/board/toradex/apalis_imx6/apalis_imx6.c b/board/toradex/apalis_imx6/apalis_imx6.c
index 0a60b36447..2c16c31021 100644
--- a/board/toradex/apalis_imx6/apalis_imx6.c
+++ b/board/toradex/apalis_imx6/apalis_imx6.c
@@ -20,13 +20,11 @@
 #include <asm/gpio.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/iomux-v3.h>
-#include <asm/mach-imx/mxc_i2c.h>
 #include <asm/mach-imx/sata.h>
 #include <asm/mach-imx/video.h>
 #include <dm/platform_data/serial_mxc.h>
 #include <environment.h>
 #include <fsl_esdhc.h>
-#include <i2c.h>
 #include <imx_thermal.h>
 #include <micrel.h>
 #include <miiphy.h>
@@ -50,32 +48,16 @@ DECLARE_GLOBAL_DATA_PTR;
 #define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP |			\
    PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED |		\
-	PAD_CTL_DSE_40ohm     | PAD_CTL_SRE_FAST)
-
-#define BUTTON_PAD_CTRL (PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS)
-
-#define I2C_PAD_CTRL	(PAD_CTL_PUS_100K_UP |			\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
-	PAD_CTL_ODE | PAD_CTL_SRE_FAST)
-
 #define WEAK_PULLUP	(PAD_CTL_PUS_100K_UP |			\
    PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
    PAD_CTL_SRE_SLOW)
-#define NO_PULLUP	(					\
-	PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS |	\
-	PAD_CTL_SRE_SLOW)
-
 #define WEAK_PULLDOWN	(PAD_CTL_PUS_100K_DOWN |		\
    PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm |			\
    PAD_CTL_HYS | PAD_CTL_SRE_SLOW)
#define TRISTATE	(PAD_CTL_HYS | PAD_CTL_SPEED_MED)
-#define OUTPUT_40OHM (PAD_CTL_SPEED_MED|PAD_CTL_DSE_40ohm)
-
 #define OUTPUT_RGB (PAD_CTL_SPEED_MED|PAD_CTL_DSE_60ohm|PAD_CTL_SRE_FAST)
int dram_init(void)
@@ -97,63 +79,6 @@ iomux_v3_cfg_t const uart1_pads_dte[] = {
    MX6_PAD_CSI0_DAT11__UART1_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
 };
-#define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
-/* Apalis I2C1 */
-struct i2c_pads_info i2c_pad_info1 = {
-	.scl = {
-		.i2c_mode = MX6_PAD_CSI0_DAT9__I2C1_SCL | PC,
-		.gpio_mode = MX6_PAD_CSI0_DAT9__GPIO5_IO27 | PC,
-		.gp = IMX_GPIO_NR(5, 27)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_CSI0_DAT8__I2C1_SDA | PC,
-		.gpio_mode = MX6_PAD_CSI0_DAT8__GPIO5_IO26 | PC,
-		.gp = IMX_GPIO_NR(5, 26)
-	}
-};
-
-/* Apalis local, PMIC, SGTL5000, STMPE811 */
-struct i2c_pads_info i2c_pad_info_loc = {
-	.scl = {
-		.i2c_mode = MX6_PAD_KEY_COL3__I2C2_SCL | PC,
-		.gpio_mode = MX6_PAD_KEY_COL3__GPIO4_IO12 | PC,
-		.gp = IMX_GPIO_NR(4, 12)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_KEY_ROW3__I2C2_SDA | PC,
-		.gpio_mode = MX6_PAD_KEY_ROW3__GPIO4_IO13 | PC,
-		.gp = IMX_GPIO_NR(4, 13)
-	}
-};
-
-/* Apalis I2C3 / CAM */
-struct i2c_pads_info i2c_pad_info3 = {
-	.scl = {
-		.i2c_mode = MX6_PAD_EIM_D17__I2C3_SCL | PC,
-		.gpio_mode = MX6_PAD_EIM_D17__GPIO3_IO17 | PC,
-		.gp = IMX_GPIO_NR(3, 17)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_EIM_D18__I2C3_SDA | PC,
-		.gpio_mode = MX6_PAD_EIM_D18__GPIO3_IO18 | PC,
-		.gp = IMX_GPIO_NR(3, 18)
-	}
-};
-
-/* Apalis I2C2 / DDC */
-struct i2c_pads_info i2c_pad_info_ddc = {
-	.scl = {
-		.i2c_mode = MX6_PAD_EIM_EB2__HDMI_TX_DDC_SCL | PC,
-		.gpio_mode = MX6_PAD_EIM_EB2__GPIO2_IO30 | PC,
-		.gp = IMX_GPIO_NR(2, 30)
-	},
-	.sda = {
-		.i2c_mode = MX6_PAD_EIM_D16__HDMI_TX_DDC_SDA | PC,
-		.gpio_mode = MX6_PAD_EIM_D16__GPIO3_IO16 | PC,
-		.gp = IMX_GPIO_NR(3, 16)
-	}
-};
-
 /* Apalis MMC1 */
 iomux_v3_cfg_t const usdhc1_pads[] = {
    MX6_PAD_SD1_CLK__SD1_CLK   | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -583,12 +508,6 @@ static void do_enable_hdmi(struct display_info_t const *dev)
    imx_enable_hdmi_phy();
 }
-static int detect_i2c(struct display_info_t const *dev)
-{
-	return (0 == i2c_set_bus_num(dev->bus)) &&
-	       (0 == i2c_probe(dev->addr));
-}
-
 static void enable_lvds(struct display_info_t const *dev)
 {
    struct iomuxc *iomux = (struct iomuxc *)
@@ -682,7 +601,6 @@ struct display_info_t const displays[] = {{
    .bus	= -1,
    .addr	= 0,
    .pixfmt	= IPU_PIX_FMT_LVDS666,
-	.detect	= detect_i2c,
    .enable	= enable_lvds,
    .mode	= {
    	.name           = "wsvga-lvds",
@@ -788,10 +706,6 @@ int board_init(void)
    /* address of boot parameters */
    gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
-	setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
-	setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info_loc);
-	setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info3);
-
 #if defined(CONFIG_VIDEO_IPUV3)
    setup_display();
 #endif
@@ -1209,7 +1123,7 @@ void board_init_f(ulong dummy)
    ccgr_init();
    gpr_init();
-	/* iomux and setup of i2c */
+	/* iomux */
    board_early_init_f();
/* setup GP timer */
diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c
index 7334e92f2e..3a944b3699 100644
--- a/board/toradex/apalis_imx6/pf0100.c
+++ b/board/toradex/apalis_imx6/pf0100.c
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0+
 /*
- * Copyright (C) 2014-2016, Toradex AG
+ * Copyright (C) 2014-2019, Toradex AG
  */
/*
@@ -9,7 +9,6 @@
#include <common.h>
 #include <i2c.h>
-#include <linux/compiler.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
@@ -30,22 +29,25 @@ static __maybe_unused iomux_v3_cfg_t const pmic_prog_pads[] = {
unsigned pmic_init(void)
 {
+	int rc;
+	struct udevice *dev = NULL;
    unsigned programmed = 0;
    uchar bus = 1;
    uchar devid, revid, val;
puts("PMIC: ");
-	if (!((0 == i2c_set_bus_num(bus)) &&
-	      (0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
-		puts("i2c bus failed\n");
+	rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev);
+	if (rc) {
+		printf("failed to get device for PMIC at address 0x%x\n",
+		       PFUZE100_I2C_ADDR);
    	return 0;
    }
    /* get device ident */
-	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) {
+	if (dm_i2c_read(dev, PFUZE100_DEVICEID, &devid, 1) < 0) {
    	puts("i2c pmic devid read failed\n");
    	return 0;
    }
-	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_REVID, 1, &revid, 1) < 0) {
+	if (dm_i2c_read(dev, PFUZE100_REVID, &revid, 1) < 0) {
    	puts("i2c pmic revid read failed\n");
    	return 0;
    }
@@ -60,7 +62,7 @@ unsigned pmic_init(void)
    	for (j = 0; j < 0x80; ) {
    		printf("\n%2x", j);
    		for (i = 0; i < 16; i++) {
-				i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
+				dm_i2c_read(dev, j + i, &val, 1);
    			printf("\t%2x", val);
    		}
    		j += 0x10;
@@ -68,8 +70,7 @@ unsigned pmic_init(void)
    	printf("\nEXT Page 1");
val = PFUZE100_PAGE_REGISTER_PAGE1;
-		if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
-			      &val, 1)) {
+		if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
    		puts("i2c write failed\n");
    		return 0;
    	}
@@ -77,7 +78,7 @@ unsigned pmic_init(void)
    	for (j = 0x80; j < 0x100; ) {
    		printf("\n%2x", j);
    		for (i = 0; i < 16; i++) {
-				i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
+				dm_i2c_read(dev, j + i, &val, 1);
    			printf("\t%2x", val);
    		}
    		j += 0x10;
@@ -85,8 +86,7 @@ unsigned pmic_init(void)
    	printf("\nEXT Page 2");
val = PFUZE100_PAGE_REGISTER_PAGE2;
-		if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1,
-			      &val, 1)) {
+		if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
    		puts("i2c write failed\n");
    		return 0;
    	}
@@ -94,35 +94,35 @@ unsigned pmic_init(void)
    	for (j = 0x80; j < 0x100; ) {
    		printf("\n%2x", j);
    		for (i = 0; i < 16; i++) {
-				i2c_read(PFUZE100_I2C_ADDR, j+i, 1, &val, 1);
+				dm_i2c_read(dev, j + i, &val, 1);
    			printf("\t%2x", val);
    		}
    		j += 0x10;
    	}
    	printf("\n");
    }
-#endif
+#endif /* DEBUG */
    /* get device programmed state */
    val = PFUZE100_PAGE_REGISTER_PAGE1;
-	if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_PAGE_REGISTER, 1, &val, 1)) {
+	if (dm_i2c_write(dev, PFUZE100_PAGE_REGISTER, &val, 1)) {
    	puts("i2c write failed\n");
    	return 0;
    }
-	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR1, 1, &val, 1) < 0) {
+	if (dm_i2c_read(dev, PFUZE100_FUSE_POR1, &val, 1) < 0) {
    	puts("i2c fuse_por read failed\n");
    	return 0;
    }
    if (val & PFUZE100_FUSE_POR_M)
    	programmed++;
-	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR2, 1, &val, 1) < 0) {
+	if (dm_i2c_read(dev, PFUZE100_FUSE_POR2, &val, 1) < 0) {
    	puts("i2c fuse_por read failed\n");
    	return programmed;
    }
    if (val & PFUZE100_FUSE_POR_M)
    	programmed++;
-	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_FUSE_POR3, 1, &val, 1) < 0) {
+	if (dm_i2c_read(dev, PFUZE100_FUSE_POR3, &val, 1) < 0) {
    	puts("i2c fuse_por read failed\n");
    	return programmed;
    }
@@ -145,18 +145,15 @@ unsigned pmic_init(void)
    if (programmed != 3) {
    	/* set VGEN1 to 1.2V */
    	val = PFUZE100_VGEN1_VAL;
-		if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_VGEN1CTL, 1,
-			      &val, 1)) {
+		if (dm_i2c_write(dev, PFUZE100_VGEN1CTL, &val, 1)) {
    		puts("i2c write failed\n");
    		return programmed;
    	}
/* set SWBST to 5.0V */
    	val = PFUZE100_SWBST_VAL;
-		if (i2c_write(PFUZE100_I2C_ADDR, PFUZE100_SWBSTCTL, 1,
-			      &val, 1)) {
+		if (dm_i2c_write(dev, PFUZE100_SWBSTCTL, &val, 1))
    		puts("i2c write failed\n");
-		}
    }
    return programmed;
 }
@@ -164,6 +161,8 @@ unsigned pmic_init(void)
 #ifndef CONFIG_SPL_BUILD
 static int pf0100_prog(void)
 {
+	int rc;
+	struct udevice *dev = NULL;
    unsigned char bus = 1;
    unsigned char val;
    unsigned int i;
@@ -177,9 +176,10 @@ static int pf0100_prog(void)
    				 ARRAY_SIZE(pmic_prog_pads));
    gpio_direction_output(PMIC_PROG_VOLTAGE, 0);
-	if (!((0 == i2c_set_bus_num(bus)) &&
-	      (0 == i2c_probe(PFUZE100_I2C_ADDR)))) {
-		puts("i2c bus failed\n");
+	rc = i2c_get_chip_for_busnum(bus, PFUZE100_I2C_ADDR, 1, &dev);
+	if (rc) {
+		printf("failed to get device for PMIC at address 0x%x\n",
+		       PFUZE100_I2C_ADDR);
    	return CMD_RET_FAILURE;
    }
@@ -187,8 +187,7 @@ static int pf0100_prog(void)
    	switch (pmic_otp_prog[i].cmd) {
    	case pmic_i2c:
    		val = (unsigned char) (pmic_otp_prog[i].value & 0xff);
-			if (i2c_write(PFUZE100_I2C_ADDR, pmic_otp_prog[i].reg,
-				      1, &val, 1)) {
+			if (dm_i2c_write(dev, pmic_otp_prog[i].reg, &val, 1)) {
    			printf("i2c write failed, reg 0x%2x, value 0x%2x\n",
    			       pmic_otp_prog[i].reg, val);
    			return CMD_RET_FAILURE;
@@ -227,4 +226,4 @@ U_BOOT_CMD(
    "Program the OTP fuses on the PMIC PF0100",
    ""
 );
-#endif
+#endif /* CONFIG_SPL_BUILD */
diff --git a/board/toradex/apalis_imx6/pf0100.h b/board/toradex/apalis_imx6/pf0100.h
index c0efb79bbc..b854fe8c54 100644
--- a/board/toradex/apalis_imx6/pf0100.h
+++ b/board/toradex/apalis_imx6/pf0100.h
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 /*
- * Copyright (C) 2014-2016, Toradex AG
+ * Copyright (C) 2014-2019, Toradex AG
  */
/*
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 0763b1d986..60c4d9720d 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -52,6 +52,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_DWC_AHSATA=y
 CONFIG_DFU_MMC=y
 CONFIG_DM_GPIO=y
+CONFIG_DM_I2C=y
 CONFIG_FSL_ESDHC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_MICREL=y
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index 7222285ab3..5ab009c8f3 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -34,12 +34,12 @@
 #define CONFIG_MXC_UART_BASE		UART1_BASE
/* I2C Configs */
-#define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
-#define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
-#define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
-#define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
+#define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
+#define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED		100000
+#define CONFIG_SYS_MXC_I2C3_SPEED	400000
/* OCOTP Configs */
 #ifdef CONFIG_CMD_FUSE
-- 
2.20.1


    