Sandbox keeps a table of addresses which map to pointers which are outside its emulated DRAM. The current range from 10000000 conflicts with the PCI range, meaning that if PCI mapping is on, that particular address can be decoded by PCI instead of the table.
Fix this by moving the range up to the top of memory. Update the docs while we are here.
Signed-off-by: Simon Glass sjg@chromium.org ---
(no changes since v1)
arch/sandbox/cpu/state.c | 9 +++++---- doc/arch/sandbox/sandbox.rst | 21 ++++++++++++--------- 2 files changed, 17 insertions(+), 13 deletions(-)
diff --git a/arch/sandbox/cpu/state.c b/arch/sandbox/cpu/state.c index a9ca79e76d2..49236db99c2 100644 --- a/arch/sandbox/cpu/state.c +++ b/arch/sandbox/cpu/state.c @@ -373,12 +373,13 @@ void state_reset_for_test(struct sandbox_state *state) memset(state->spi, '\0', sizeof(state->spi));
/* - * Set up the memory tag list. Use the top of emulated SDRAM for the - * first tag number, since that address offset is outside the legal - * range, and can be assumed to be a tag. + * Set up the memory tag list. We could use the top of emulated SDRAM + * for the first tag number, since that address offset is outside the + * legal SDRAM range, but PCI can have address there. So use a very + * large address instead */ INIT_LIST_HEAD(&state->mapmem_head); - state->next_tag = state->ram_size; + state->next_tag = 0xff000000; }
bool autoboot_keyed(void) diff --git a/doc/arch/sandbox/sandbox.rst b/doc/arch/sandbox/sandbox.rst index 5f8db126657..1515f93c84b 100644 --- a/doc/arch/sandbox/sandbox.rst +++ b/doc/arch/sandbox/sandbox.rst @@ -655,14 +655,17 @@ Memory Map Sandbox has its own emulated memory starting at 0. Here are some of the things that are mapped into that memory:
-======= ======================== =============================== +======== ======================== =============================== Addr Config Usage -======= ======================== =============================== - 100 CONFIG_SYS_FDT_LOAD_ADDR Device tree - b000 CONFIG_BLOBLIST_ADDR Blob list - 10000 CFG_MALLOC_F_ADDR Early memory allocation - f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer - 100000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used +======== ======================== =============================== + 100 CONFIG_SYS_FDT_LOAD_ADDR Device tree + b000 CONFIG_BLOBLIST_ADDR Blob list + 10000 CFG_MALLOC_F_ADDR Early memory allocation + f0000 CONFIG_PRE_CON_BUF_ADDR Pre-console buffer + 100000 CONFIG_TRACE_EARLY_ADDR Early trace buffer (if enabled). Also used as the SPL load buffer in spl_test_load(). - 200000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) -======= ======================== =============================== + 200000 CONFIG_TEXT_BASE Load buffer for U-Boot (sandbox_spl only) +10000000 PCI address space (see test.dts) + +ff000000 Memory-mapping tags start here +======== ======================== ===============================