On 08/22/2016 05:02 PM, Chin Liang See wrote:
Add device tree for Stratix 10 SoC development kit
Signed-off-by: Chin Liang See clsee@altera.com Cc: Marek Vasut marex@denx.de Cc: Dinh Nguyen dinguyen@opensource.altera.com Cc: Ley Foon Tan lftan@altera.com
Acked-by: Marek Vasut marex@denx.de
arch/arm/dts/Makefile | 3 +- arch/arm/dts/socfpga_stratix10_socdk.dts | 64 ++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+), 1 deletion(-) create mode 100755 arch/arm/dts/socfpga_stratix10_socdk.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 223124e..c5e2d3c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -127,7 +127,8 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_cyclone5_sockit.dtb \ socfpga_cyclone5_socrates.dtb \ socfpga_cyclone5_sr1500.dtb \
- socfpga_cyclone5_vining_fpga.dtb
- socfpga_cyclone5_vining_fpga.dtb \
- socfpga_stratix10_socdk.dtb
dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \ diff --git a/arch/arm/dts/socfpga_stratix10_socdk.dts b/arch/arm/dts/socfpga_stratix10_socdk.dts new file mode 100755 index 0000000..7a662ee --- /dev/null +++ b/arch/arm/dts/socfpga_stratix10_socdk.dts @@ -0,0 +1,64 @@ +/*
- Copyright (C) 2016 Intel Corporation
- SPDX-License-Identifier: GPL-2.0
- */
+/dts-v1/; +/* First 4KB has trampoline code for secondary cores. */ +/memreserve/ 0x00000000 0x0001000; +#include "skeleton.dtsi"
+/ {
- model = "Altera SOCFPGA Stratix 10 SoC Development Kit";
- compatible = "altr,socfpga-stratix10", "altr,socfpga";
- #address-cells = <1>;
- #size-cells = <1>;
- chosen {
bootargs = "console=ttyS0,115200";- };
- memory {
name = "memory";device_type = "memory";reg = <0x0 0x40000000>; /* 1GB */- };
- regulator_3_3v: 3-3-v-regulator {
compatible = "regulator-fixed";regulator-name = "3.3V";regulator-min-microvolt = <3300000>;regulator-max-microvolt = <3300000>;- };
- soc {
#address-cells = <1>;#size-cells = <1>;compatible = "simple-bus";device_type = "soc";ranges;mmc0: dwmmc0@0xff808000 {compatible = "altr,socfpga-dw-mshc";reg = <0xff808000 0x1000>;interrupts = <0 139 4>;num-slots = <1>;broken-cd;bus-width = <4>;fifo-depth = <0x400>;#address-cells = <1>;#size-cells = <0>;cap-mmc-highspeed;cap-sd-highspeed;drvsel = <3>;smplsel = <0>;status = "okay";u-boot,dm-pre-reloc;vmmc-supply = <®ulator_3_3v>;vqmmc-supply = <®ulator_3_3v>;};- };
+};