On Wed, 2018-03-14 at 20:36 -0500, David Lechner wrote:
commit 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency") changed the PLL0 frequency to 456MHz, which is needed for the LCDC IP block. However, in doing so, it caused the PLLOUT clock to be outside of the allowable specifications given in the OMAP-L138 data sheet. (It says PLLOUT must be 600MHz max). It also uses a PLLM value outside of the range given in the TRM (it says PLLM must in the range 0 to 0x1f).
So here is what we have currently:
PLLOUT = 24 / (0 + 1) * (37 + 1) = 912MHz (out of spec) ^ ^ ^ CLKIN PREDIV PLLM (out of spec)
input to PLLDIVn = 912 / (1 + 1) = 456MHz (desired result) ^ ^ PLLOUT POSTDIV
This changes the PLLM value to 18 and the POSTDIV value to 0 so that PLLOUT is now within specification but we still get the desired result.
PLLOUT = 24 / (0 + 1) * (18 + 1) = 456MHz (within spec) ^ ^ ^ CLKIN PREDIV PLLM
input to PLLDIVn = 456 / (0 + 1) = 456MHz (desired result) ^ ^ PLLOUT POSTDIV
Fixes: 1601dd97edc6 ("davinci: omapl138_lcdk: increase PLL0 frequency") Signed-off-by: David Lechner david@lechnology.com
FYI, I haven't been able to test this patch yet. The changes affect the SPL image, which has to be flashed to SPI. I am having trouble with the flash utility[1] running on Linux. It gets stuck at:
0% [ ------------------------------------------------------------ ] Programming application into flash...
So, if anyone has some advice on how to make it work or can test the patch, that would be helpful.
I have done a first-pass sanity check and it works. However the current default setup is not what I have been using (this is the first time in some months I've done anything on the LCDK) and I haven't booted out of u-boot, so I wouldn't call this "works perfectly". I'll do some more serious testing over the weekend.
Cross-compile toolchain: gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)
Flash command: mono sfh_OMAP-L138.exe -flash_noubl -targetType OMAPL138_LCDK -flashType NAND -p /dev/ttyUSB1 u-boot.ais
Console output on boot: U-Boot SPL 2018.03-00068-g218da80-dirty (Mar 15 2018 - 21:15:08 +1100) Trying to boot from NAND
U-Boot SPL 2018.03-00068-g218da80-dirty (Mar 15 2018 - 21:15:08 +1100) Trying to boot from NAND
U-Boot SPL 2018.03-00068-g218da80-dirty (Mar 15 2018 - 21:15:08 +1100) Trying to boot from NAND
(As I don't have anything set up on NAND the cycling is to be expected)
However, the bootloader on my LCDK is using these values already, so I expect this to work as advertized.
ading_Utility_for_OMAP-L138
configs/omapl138_lcdk_defconfig | 1 + include/configs/omapl138_lcdk.h | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index ccb308b..0a2af11 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_DAVINCI=y CONFIG_SYS_TEXT_BASE=0xc1080000 CONFIG_TARGET_OMAPL138_LCDK=y +CONFIG_SYS_DA850_PLL0_POSTDIV=0 CONFIG_SYS_DA850_PLL1_PLLDIV3=0x8003 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index ea7bdf1..1e1c66b 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -57,7 +57,8 @@
- PLL configuration
*/
-#define CONFIG_SYS_DA850_PLL0_PLLM 37 +/* Requires CONFIG_SYS_DA850_PLL0_POSTDIV=0, set in Kconfig */ +#define CONFIG_SYS_DA850_PLL0_PLLM 18 #define CONFIG_SYS_DA850_PLL1_PLLM 21
/*