
Hi Bin
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Wednesday, July 26, 2017 3:34 PM To: Ran Wang ran.wang_1@nxp.com Cc: Marek Vasut marex@denx.de; Patrice Chotard patrice.chotard@st.com; Simon Glass sjg@chromium.org; Masahiro Yamada yamada.masahiro@socionext.com; Jiafei Pan jiafei.pan@nxp.com; u- boot@lists.denx.de; Xiaobo Xie xiaobo.xie@nxp.com Subject: Re: Compile failure encountered on latest (2017-07-20) git://git.denx.de/u-boot-usb.git branch master for target ls1021atwr_nor_defconfig
Hi Ran,
On Wed, Jul 26, 2017 at 2:37 PM, Ran Wang ran.wang_1@nxp.com wrote:
Hi Bin
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Wednesday, July 26, 2017 12:41 PM To: Ran Wang ran.wang_1@nxp.com Cc: Marek Vasut marex@denx.de; Patrice Chotard patrice.chotard@st.com; Simon Glass sjg@chromium.org; Masahiro Yamada yamada.masahiro@socionext.com; Jiafei Pan jiafei.pan@nxp.com; u- boot@lists.denx.de; Xiaobo Xie xiaobo.xie@nxp.com Subject: Re: Compile failure encountered on latest (2017-07-20) git://git.denx.de/u-boot-usb.git branch master for target ls1021atwr_nor_defconfig
Hi Ran,
On Wed, Jul 26, 2017 at 11:30 AM, Ran Wang ran.wang_1@nxp.com
wrote:
Hi Bin
-----Original Message----- From: Bin Meng [mailto:bmeng.cn@gmail.com] Sent: Tuesday, July 25, 2017 8:22 PM To: Ran Wang ran.wang_1@nxp.com Cc: Marek Vasut marex@denx.de; Patrice Chotard patrice.chotard@st.com; Simon Glass sjg@chromium.org; Masahiro Yamada yamada.masahiro@socionext.com; Jiafei Pan jiafei.pan@nxp.com; u- boot@lists.denx.de; Xiaobo Xie xiaobo.xie@nxp.com Subject: Re: Compile failure encountered on latest (2017-07-20) git://git.denx.de/u-boot-usb.git branch master for target ls1021atwr_nor_defconfig
Hi Ran,
On Tue, Jul 25, 2017 at 7:01 PM, Ran Wang ran.wang_1@nxp.com
wrote:
> -----Original Message----- > From: Bin Meng [mailto:bmeng.cn@gmail.com] > Sent: Friday, July 21, 2017 8:29 PM > To: Ran Wang ran.wang_1@nxp.com > Cc: Marek Vasut marex@denx.de; Patrice Chotard > patrice.chotard@st.com; Simon Glass sjg@chromium.org; > Masahiro Yamada yamada.masahiro@socionext.com; Jiafei Pan > jiafei.pan@nxp.com; u- boot@lists.denx.de > Subject: Re: Compile failure encountered on latest (2017-07-20) > git://git.denx.de/u-boot-usb.git branch master for target > ls1021atwr_nor_defconfig > > Hi Ran, Hi Bin. > > On Thu, Jul 20, 2017 at 5:47 PM, Ran Wang ran.wang_1@nxp.com
wrote:
> > Hi All, > > Actually I just plan to try feature of support SS hub > > which just enabled this > yesterday on LS1021ATWR (I know need to enable DM_USB for 1021
first).
> > Should the DM_USB enablement be this patch done by Alison? > https://patchwork.ozlabs.org/patch/785387/ > > > Per your knowledge, if I revert the patches I pasted in > > last mail, the SS hub > support feature will be impacted or not? > > Thanks. > > Note the SS hub support only exists in DM USB. If you revert > the dwc3-xhci patchset which converts dwc3 to DM USB, you will > not get the SS
hub support.
Thanks for your information, I will re-check this impact with my board. Actually I have encountered enumeration random fail issue with an USB 3.0 thumb drive (Kingston DataTraveler 3.0) after SS hub Please see attached
snapshot for details. Fail rate is about 9/30. Not sure it's relevant to SS hub patch or not yet.
>
Can you enable the -DDEBUG and send me the log? From the last attachment, the enumeration process already failed when getting device descriptor. Any subsequent op leads to the final BUG/reset.
I don't know where to add -DDEBUG in U-Boot Makefile, could you show
me?
Anyway I've added DEBUG in file include/common.h and got some verbose log for you (seems not much in error point), pls see attached. Any further suggestion are welcome.
Thanks for the log. Can you try to do the same testing on u-boot-x86/xhci-wip branch to see if makes any difference? If no, please
send the DEBUG log as well.
Seems failure changed a little bit, and fail rate rise to ~100%.
From your log, this time the failure is different. Somehow the USB flash disk reports its speed is full speed but it should be super speed, so xHCI cannot address it. I believe the hub handling logic is still buggy in the U-Boot. Which hub are you using for testing?
We are using an on-board USB 3.0 hub chip which contain a SS hub (USB5534B) and a HS hub (USB2134B). And I suspect there are difference on code base between u-boot-usb and u-boot-x86 specific branch which might lead to the result divers, I have tried them many times to confirm the difference failure is not a random failure, for your reference.
USB device tree: 1 Hub (5 Gb/s, 0mA) | U-Boot XHCI Host Controller | +-2 Hub (480 Mb/s, 0mA) | SMSC USB2134B | +-3 Hub (5 Gb/s, 0mA) | SMSC USB5534B | +-4 Mass Storage (5 Gb/s, 126mA) Kingston DataTraveler 3.0 08606E69C773BF1099650055 BR Ran