Hi Erik,
On 08/13/2015 03:43 PM, Erik van Luijk wrote:
On these boards the DDR is connected to a dedicated controller and not to chip select 1 of the EBI.
from the specs this seems correct. Could I please get a Tested-by, since I do not own one of these boards.
Best regards
Andreas
Signed-off-by: Erik van Luijk evanluijk@interact.nl
board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c | 8 -------- board/siemens/corvus/board.c | 8 -------- 2 files changed, 16 deletions(-)
diff --git a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c index 3e65d71..d2ade4d 100644 --- a/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c +++ b/board/atmel/at91sam9m10g45ek/at91sam9m10g45ek.c @@ -131,21 +131,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2) void mem_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; struct atmel_mpddr ddr2;
unsigned long csa;
ddr2_conf(&ddr2);
/* enable DDR2 clock */ writel(0x4, &pmc->scer);
/* Chip select 1 is for DDR2/SDRAM */
csa = readl(&mat->ebicsa);
csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
writel(csa, &mat->ebicsa);
/* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
} diff --git a/board/siemens/corvus/board.c b/board/siemens/corvus/board.c index 9001fcbcf..d74743f 100644 --- a/board/siemens/corvus/board.c +++ b/board/siemens/corvus/board.c @@ -144,21 +144,13 @@ static void ddr2_conf(struct atmel_mpddr *ddr2) void mem_init(void) { struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX; struct atmel_mpddr ddr2;
unsigned long csa;
ddr2_conf(&ddr2);
/* enable DDR2 clock */ writel(0x4, &pmc->scer);
/* Chip select 1 is for DDR2/SDRAM */
csa = readl(&mat->ebicsa);
csa |= AT91_MATRIX_EBI_CS1A_SDRAMC;
csa &= ~AT91_MATRIX_EBI_VDDIOMSEL_3_3V;
writel(csa, &mat->ebicsa);
/* DDRAM2 Controller initialize */ ddr2_init(ATMEL_BASE_DDRSDRC0, ATMEL_BASE_CS6, &ddr2);
}