PX5 EVB is designed by Rockchip for automotive field with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS HDMI video input/output interface, audio codec ES8396, WIFI / BT (on RTL8723BS), Gsensor BMA250E and light&proximity sensor STK3410.
Signed-off-by: Andy Yan andy.yan@rock-chips.com ---
arch/arm/dts/Makefile | 5 +- arch/arm/dts/rk3368-px5-evb.dts | 319 ++++++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/rk3368/Kconfig | 9 + board/rockchip/evb_px5/Kconfig | 15 ++ board/rockchip/evb_px5/MAINTAINERS | 6 + board/rockchip/evb_px5/Makefile | 7 + board/rockchip/evb_px5/evb-px5.c | 47 +++++ configs/evb-px5_defconfig | 30 ++++ include/configs/evb_px5.h | 18 ++ 9 files changed, 454 insertions(+), 2 deletions(-) create mode 100644 arch/arm/dts/rk3368-px5-evb.dts create mode 100644 board/rockchip/evb_px5/Kconfig create mode 100644 board/rockchip/evb_px5/MAINTAINERS create mode 100644 board/rockchip/evb_px5/Makefile create mode 100644 board/rockchip/evb_px5/evb-px5.c create mode 100644 configs/evb-px5_defconfig create mode 100644 include/configs/evb_px5.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index fbc97e8..d786611 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -42,9 +42,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ rk3288-veyron-minnie.dtb \ rk3328-evb.dtb \ rk3368-geekbox.dtb \ + rk3368-px5-evb.dtb \ rk3399-evb.dtb \ - rk3399-puma.dtb - rk3368-geekbox.dtb + rk3399-puma.dtb \ + rk3399-evb.dtb dtb-$(CONFIG_ARCH_MESON) += \ meson-gxbb-odroidc2.dtb dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ diff --git a/arch/arm/dts/rk3368-px5-evb.dts b/arch/arm/dts/rk3368-px5-evb.dts new file mode 100644 index 0000000..c7478f7 --- /dev/null +++ b/arch/arm/dts/rk3368-px5-evb.dts @@ -0,0 +1,319 @@ +/* + * Copyright (c) 2017 Rockchip Electronics Co., Ltd + * + * This file is dual-licensed: you can use it either under the terms + * of the GPL or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This file is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This file is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +/dts-v1/; +#include "rk3368.dtsi" +#include <dt-bindings/input/input.h> + +/ { + model = "PX5 EVB"; + compatible = "rockchip,px5-evb", "rockchip,px5", "rockchip,rk3368"; + + chosen { + stdout-path = "serial4:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x40000000>; + }; + + ext_gmac: gmac-clk { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "ext_gmac"; + #clock-cells = <0>; + }; + + ir: ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio3 30 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_int>; + }; + + keys: gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key>; + + power { + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + label = "GPIO Power"; + linux,code = <KEY_POWER>; + wakeup-source; + }; + }; + + leds: gpio-leds { + compatible = "gpio-leds"; + + blue { + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + label = "geekbox:blue:led"; + default-state = "on"; + }; + + red { + gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; + label = "geekbox:red:led"; + default-state = "off"; + }; + }; + + vcc_sys: vcc-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&emmc { + status = "okay"; + bus-width = <8>; + cap-mmc-highspeed; + clock-frequency = <150000000>; + disable-wp; + keep-power-in-suspend; + non-removable; + num-slots = <1>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_flash>; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>; +}; + +&gmac { + status = "okay"; + phy-supply = <&vcc_lan>; + phy-mode = "rgmii"; + clock_in_out = "input"; + assigned-clocks = <&cru SCLK_MAC>; + assigned-clock-parents = <&ext_gmac>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + tx_delay = <0x30>; + rx_delay = <0x10>; +}; + +&i2c0 { + status = "okay"; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>, <&pmic_sleep>; + interrupt-parent = <&gpio0>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; + rockchip,system-power-controller; + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc_io>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc_io>; + clock-output-names = "xin32k", "rk808-clkout2"; + #clock-cells = <1>; + + regulators { + vdd_cpu: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd_cpu"; + }; + + vdd_log: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1500000>; + regulator-name = "vdd_log"; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_ddr"; + }; + + vcc_io: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_io"; + }; + + vcc18_flash: LDO_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_flash"; + }; + + vcc33_lcd: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc33_lcd"; + }; + + vdd_10: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd_10"; + }; + + vcca_18: LDO_REG4 { + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcca_18"; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vccio_sd"; + }; + + vdd10_lcd: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-name = "vdd10_lcd"; + }; + + vcc_18: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_18"; + }; + + vcc18_lcd: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc18_lcd"; + }; + + vcc_sd: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_sd"; + }; + + vcc_lan: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc_lan"; + }; + }; + }; +}; + +&pinctrl { + ir { + ir_int: ir-int { + rockchip,pins = <3 30 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + keys { + pwr_key: pwr-key { + rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_sleep: pmic-sleep { + rockchip,pins = <0 0 RK_FUNC_2 &pcfg_pull_none>; + }; + + pmic_int: pmic-int { + rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + +&tsadc { + status = "okay"; + rockchip,hw-tshut-mode = <0>; /* CRU */ + rockchip,hw-tshut-polarity = <1>; /* high */ +}; + +&uart4 { + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_otg { + status = "okay"; +}; + +&wdt { + status = "okay"; +}; diff --git a/arch/arm/mach-rockchip/rk3368/Kconfig b/arch/arm/mach-rockchip/rk3368/Kconfig index c7e9933..693d538 100644 --- a/arch/arm/mach-rockchip/rk3368/Kconfig +++ b/arch/arm/mach-rockchip/rk3368/Kconfig @@ -6,6 +6,14 @@ choice config TARGET_GEEKBOX bool "GeekBox"
+config TARGET_EVB_PX5 + bool "Evb-PX5" + help + PX5 EVB is designed by Rockchip for automotive field + with integrated CVBS (TP2825) / MIPI DSI / CSI / LVDS + HDMI video input/output interface, audio codec ES8396, + WIFI/BT (on RTL8723BS), Gsensor BMA250E and light&proximity + sensor STK3410. endchoice
config SYS_SOC @@ -15,5 +23,6 @@ config SYS_MALLOC_F_LEN default 0x0800
source "board/geekbuying/geekbox/Kconfig" +source "board/rockchip/evb_px5/Kconfig"
endif diff --git a/board/rockchip/evb_px5/Kconfig b/board/rockchip/evb_px5/Kconfig new file mode 100644 index 0000000..9a04ee7 --- /dev/null +++ b/board/rockchip/evb_px5/Kconfig @@ -0,0 +1,15 @@ +if TARGET_EVB_PX5 + +config SYS_BOARD + default "evb_px5" + +config SYS_VENDOR + default "rockchip" + +config SYS_CONFIG_NAME + default "evb_px5" + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + +endif diff --git a/board/rockchip/evb_px5/MAINTAINERS b/board/rockchip/evb_px5/MAINTAINERS new file mode 100644 index 0000000..5d09fbf --- /dev/null +++ b/board/rockchip/evb_px5/MAINTAINERS @@ -0,0 +1,6 @@ +PX5 EVB +M: Andy Yan andy.yan@rock-chips.com +S: Maintained +F: board/rockchip/evb_px5 +F: include/configs/evb_px5.h +F: configs/evb-px5_defconfig diff --git a/board/rockchip/evb_px5/Makefile b/board/rockchip/evb_px5/Makefile new file mode 100644 index 0000000..f5aa5a9 --- /dev/null +++ b/board/rockchip/evb_px5/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (c) 2017 Rockchip Electronics Co., Ltd +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y += evb-px5.o diff --git a/board/rockchip/evb_px5/evb-px5.c b/board/rockchip/evb_px5/evb-px5.c new file mode 100644 index 0000000..a589a6e --- /dev/null +++ b/board/rockchip/evb_px5/evb-px5.c @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2017 Andy Yan + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#include <common.h> +#include <asm/io.h> +#include <asm/arch/clock.h> +#include <asm/arch/grf_rk3368.h> +#include <syscon.h> + +DECLARE_GLOBAL_DATA_PTR; + +int mach_cpu_init(void) +{ + struct rk3368_pmu_grf *pmugrf = (void *)PMU_GRF_BASE; + + rk_clrsetreg(&pmugrf->gpio0d_iomux, + GPIO0D0_MASK | GPIO0D1_MASK | + GPIO0D2_MASK | GPIO0D3_MASK, + GPIO0D0_GPIO << GPIO0D0_SHIFT | + GPIO0D1_GPIO << GPIO0D1_SHIFT | + GPIO0D2_UART4_SOUT << GPIO0D2_SHIFT | + GPIO0D3_UART4_SIN << GPIO0D3_SHIFT); + return 0; +} + +int board_init(void) +{ + return 0; +} + +int dram_init(void) +{ + gd->ram_size = 0x40000000; + + return 0; +} + +int dram_init_banksize(void) +{ + /* Reserve 0x200000 for ATF bl31 */ + gd->bd->bi_dram[0].start = 0x200000; + gd->bd->bi_dram[0].size = 0x3fe00000; + + return 0; +} diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig new file mode 100644 index 0000000..944d5bd --- /dev/null +++ b/configs/evb-px5_defconfig @@ -0,0 +1,30 @@ +CONFIG_ARM=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_ROCKCHIP_RK3368=y +CONFIG_TARGET_EVB_PX5=y +CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" +CONFIG_HUSH_PARSER=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_ARCH_EARLY_INIT_R=y +CONFIG_FASTBOOT=y +CONFIG_ANDROID_BOOT_IMAGE=y +CONFIG_CMD_BOOTRK=y +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MMC=y +CONFIG_CMD_CACHE=y +CONFIG_REGMAP=y +CONFIG_SYSCON=y +CONFIG_CLK=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_PINCTRL=y +CONFIG_ROCKCHIP_RK3368_PINCTRL=y +CONFIG_RAM=y +CONFIG_DEBUG_UART=y +CONFIG_DEBUG_UART_BASE=0xFF1c0000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_DEBUG_UART_ANNOUNCE=y +CONFIG_DEBUG_UART_SKIP_INIT=y +CONFIG_SYSRESET=y +CONFIG_ERRNO_STR=y diff --git a/include/configs/evb_px5.h b/include/configs/evb_px5.h new file mode 100644 index 0000000..143a1d6 --- /dev/null +++ b/include/configs/evb_px5.h @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2017 Rockchip Electronics Co., Ltd + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIGS_PX5_EVB_H +#define __CONFIGS_PX5_EVB_H + +#include <configs/rk3368_common.h> + +#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_SIZE 0x2000 + +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 + +#endif