
Hi Simon,
On Tue, Jan 27, 2015 at 9:23 AM, Simon Glass sjg@chromium.org wrote:
This setting will be used by more than just ivybridge so make it common.
Signed-off-by: Simon Glass sjg@chromium.org
arch/x86/Kconfig | 12 ++++++++++++ board/google/chromebook_link/Kconfig | 1 - 2 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 90e828a..1523c91 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -356,4 +356,16 @@ source "board/google/chromebook_link/Kconfig"
source "board/intel/crownbay/Kconfig"
+config MMCONF_BASE_ADDRESS
This name is sort of generic. How about PCIE_ECAM_BASE?
hex
default 0xe0000000
help
This is the address of PCI configuration space. It can be set up
Would it be better to write: This is the memory-mapped address of PCI configuration space, which is only available through Enhanced Configuration Access Mechanism (ECAM) with PCI Express.
amost anywhere. Before it is set up, it is possible to access PCI
Typo of 'almost'. How about it is 'only' possible?
configuration space through I/O access, but memory access is more
convenient. Using this, PCI can be scanned and configured. This
should be set to a region that does not conflict with memory
assigned to PCI devices - i.e. the memory and prefetch regions, as
passed to pci_set_region().
endmenu diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 33a31f3..948af59 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -23,7 +23,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_8192
config MMCONF_BASE_ADDRESS
hex default 0xf0000000
config EARLY_POST_CROS_EC
Regards, Bin