On Wed, Apr 22, 2020 at 2:15 AM Atish Patra atish.patra@wdc.com wrote:
In RISC-V, M-mode software can reserve physical memory regions by setting appropriate physical memory protection (PMP) csr. As the PMP csr are accessible only in M-mode, S-mode U-Boot can not read this configuration directly. However, M-mode software can pass this information via reserved-memory node in device tree so that S-mode software can access this information.
This patch provides a framework to copy to the reserved-memory node from one DT to another. This will be used to update the DT used by U-Boot and the DT passed to the next stage OS.
Signed-off-by: Atish Patra atish.patra@wdc.com Reviewed-by: Bin Meng bmeng.cn@gmail.com
arch/riscv/cpu/start.S | 1 + arch/riscv/include/asm/global_data.h | 1 + arch/riscv/include/asm/u-boot-riscv.h | 2 + arch/riscv/lib/Makefile | 1 + arch/riscv/lib/asm-offsets.c | 1 + arch/riscv/lib/fdt_fixup.c | 102 ++++++++++++++++++++++++++ 6 files changed, 108 insertions(+) create mode 100644 arch/riscv/lib/fdt_fixup.c
Tested-by: Bin Meng bmeng.cn@gmail.com