Hi Marek, Cody,
On 7/3/23 18:33, Cody Green wrote:
'mxs_power_enable_4p2()' function call was added to 'mxs_batt_boot()' in 'commit a0f97610757d' to enable DCDC converter when board is powered from 5V and has detected sufficient battery voltage. This involves enabling 4P2 regulator and there is a code in 'mxs_power_enable_4p2()' that disables VDDIO, VDDA, VDDD outputs of the DCDC converter and enables BO for each power rail:
setbits_le32(&power_regs->hw_power_vddioctrl, POWER_VDDIOCTRL_DISABLE_FET | POWER_VDDIOCTRL_PWDN_BRNOUT);
There is no issue if the MXS is powered from the 5V source and linear regulators are supplying power to the VDDIO, VDDA, VDDD rails. However, if the MXS is powered only from the DCDC_BATT without 5V, disabling the DCDC converter outputs causes VDDIO, VDDA, VDDD rails to lose power.
I think that I've also hit the same issue with the XEA board (upstreamed).
I've prepared a set of patches: https://patchwork.ozlabs.org/project/uboot/patch/20230509143243.1523791-5-lu...
to fix this problem.
Those patches are now for some time on the mailing list for review - and I do hope that Stefano will pull them with next PR for u-boot-imx repository.
The proposed solution is not to call the 'mxs_power_enable_4p2()' function if the MXS is powered only by the DCDC_BATT, because there is no reason to enable 4P2 regulator in this case.
I think this patch: https://patchwork.ozlabs.org/project/uboot/patch/20230509143243.1523791-3-lu...
address exactly this issue.
Also 5V brownout should not be enabled in 'mxs_power_init()' and linear regulator checks should be disabled in 'mxs_power_set_vddx()'.
I've also added some code to limit the VDD5V current when we intend to use DCDC_BATT input as the _primary_ source of power (AN4199 advises this one for industrial applications as the most reliable).
Signed-off-by: Cody Green cody@londelec.com Cc: Stefano Babic sbabic@denx.de Cc: Marek Vasut marex@denx.de Cc: Fabio Estevam festevam@gmail.com
arch/arm/cpu/arm926ejs/mxs/spl_power_init.c | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c index 33b76533e4..72172705f2 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c @@ -752,7 +752,9 @@ static void mxs_batt_boot(void) POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK, 0x8 << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
+#ifndef CFG_SPL_MXS_NO_VDD5V_SOURCE mxs_power_enable_4p2(); +#endif }
/** @@ -1137,8 +1139,11 @@ static void mxs_power_set_vddx(const struct mxs_vddx_cfg *cfg, cur_target += cfg->lowest_mV;
adjust_up = new_target > cur_target;
+#ifndef CFG_SPL_MXS_NO_VDD5V_SOURCE if (cfg->powered_by_linreg) powered_by_linreg = cfg->powered_by_linreg(); +#endif
if (adjust_up && cfg->bo_irq) { if (powered_by_linreg) { @@ -1269,7 +1274,9 @@ void mxs_power_init(void) POWER_CTRL_VBUS_VALID_IRQ | POWER_CTRL_BATT_BO_IRQ | POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr); +#ifndef CFG_SPL_MXS_NO_VDD5V_SOURCE writel(POWER_5VCTRL_PWDN_5VBRNOUT, &power_regs->hw_power_5vctrl_set); +#endif
early_delay(1000); }
+CC Lukasz
Best regards,
Lukasz Majewski
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