On Thu, Nov 26, 2015 at 02:35:28AM +0100, Marek Vasut wrote:
On Thursday, November 26, 2015 at 02:27:01 AM, Peng Fan wrote:
Hi Marek,
On Thu, Nov 26, 2015 at 12:15:44AM +0100, Marek Vasut wrote:
The following patch changed the PFUZE100 swbst register bit definitions and broke PMIC configuration on multiple boards, at least on the novena and gw_ventana. This patch fixes it.
commit 8fa46350a4c7dca7710362f6c871098557b934ad Author: Peng Fan Peng.Fan@freescale.com Date: Fri Aug 7 16:43:45 2015 +0800
power: regulator: add pfuze100 support
Signed-off-by: Marek Vasut marex@denx.de Cc: Fabio Estevam fabio.estevam@freescale.com Cc: Peng Fan Peng.Fan@freescale.com Cc: Przemyslaw Marczak p.marczak@samsung.com Cc: Tim Harvey tharvey@gateworks.com Cc: Vagrant Cascadian vagrant@aikidev.net
include/power/pfuze100_pmic.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index 41cb710..cc019a9 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -215,10 +215,10 @@ enum {
#define SWBST_VOL_MASK 0x3 #define SWBST_MODE_MASK 0xC #define SWBST_MODE_SHIFT 0x2
-#define SWBST_MODE_OFF 0 -#define SWBST_MODE_PFM 1 -#define SWBST_MODE_AUTO 2 -#define SWBST_MODE_APS 3 +#define SWBST_MODE_OFF (0 << 2) +#define SWBST_MODE_PFM (1 << 2) +#define SWBST_MODE_AUTO (2 << 2) +#define SWBST_MODE_APS (3 << 2)
Can we use "(SWBST_MODE_AUTO << SWBST_MODE_SHIFT)" in the board code, but not revert this?
I undid the breakage introduced by the aforementioned patch. If you want to update all the boards which use these macros and then drop the bitshift, patch is welcome, but that's beyond the scope of this fix.
Hmm. My original patch is that bit shift not included into "mode", the user need to do bitshift by itself. I'll check the pfuze100_regulator driver.
If "mode" needs to include the bit shift, then patch is ok and Reviewed-by: Peng Fan Peng.Fan@freescale.com
Regards, Peng.
Best regards, Marek Vasut
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