Add support for Qualcomm QCS404 SoC based evaluation board.
Features: - Qualcomm Snapdragon QCS404 SoC - 1GiB RAM - 8GiB eMMC, uSD slot
U-boot is chain loaded by ABL in 64-bit mode as part of boot.img. For detailed build and boot instructions, refer to doc/board/qualcomm/qcs404.rst.
Signed-off-by: Sumit Garg sumit.garg@linaro.org --- arch/arm/dts/Makefile | 1 + arch/arm/dts/qcs404-evb-uboot.dtsi | 24 +++++++ arch/arm/dts/qcs404-evb.dts | 81 ++++++++++++++++++++++++ arch/arm/mach-snapdragon/Kconfig | 11 ++++ arch/arm/mach-snapdragon/Makefile | 2 + arch/arm/mach-snapdragon/sysmap-qcs404.c | 31 +++++++++ board/qualcomm/qcs404-evb/Kconfig | 15 +++++ board/qualcomm/qcs404-evb/MAINTAINERS | 6 ++ board/qualcomm/qcs404-evb/Makefile | 6 ++ board/qualcomm/qcs404-evb/qcs404-evb.c | 33 ++++++++++ board/qualcomm/qcs404-evb/qcs404-evb.its | 64 +++++++++++++++++++ configs/qcs404evb_defconfig | 39 ++++++++++++ doc/board/qualcomm/index.rst | 1 + doc/board/qualcomm/qcs404.rst | 79 +++++++++++++++++++++++ include/configs/qcs404-evb.h | 27 ++++++++ 15 files changed, 420 insertions(+) create mode 100644 arch/arm/dts/qcs404-evb-uboot.dtsi create mode 100644 arch/arm/dts/qcs404-evb.dts create mode 100644 arch/arm/mach-snapdragon/sysmap-qcs404.c create mode 100644 board/qualcomm/qcs404-evb/Kconfig create mode 100644 board/qualcomm/qcs404-evb/MAINTAINERS create mode 100644 board/qualcomm/qcs404-evb/Makefile create mode 100644 board/qualcomm/qcs404-evb/qcs404-evb.c create mode 100644 board/qualcomm/qcs404-evb/qcs404-evb.its create mode 100644 configs/qcs404evb_defconfig create mode 100644 doc/board/qualcomm/qcs404.rst create mode 100644 include/configs/qcs404-evb.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a7e0d9f6c0..a561b28cef 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -502,6 +502,7 @@ dtb-$(CONFIG_TARGET_TEN64) += fsl-ls1088a-ten64.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb dtb-$(CONFIG_TARGET_STARQLTECHN) += starqltechn.dtb +dtb-$(CONFIG_TARGET_QCS404EVB) += qcs404-evb.dtb
dtb-$(CONFIG_TARGET_STEMMY) += ste-ux500-samsung-stemmy.dtb
diff --git a/arch/arm/dts/qcs404-evb-uboot.dtsi b/arch/arm/dts/qcs404-evb-uboot.dtsi new file mode 100644 index 0000000000..c18080a483 --- /dev/null +++ b/arch/arm/dts/qcs404-evb-uboot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * U-Boot addition to handle QCS404 EVB pre-relocation devices + * + * (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org + */ + +/ { + soc { + u-boot,dm-pre-reloc; + + pinctrl_north@1300000 { + u-boot,dm-pre-reloc; + }; + + clock-controller@1800000 { + u-boot,dm-pre-reloc; + }; + + serial@78b1000 { + u-boot,dm-pre-reloc; + }; + }; +}; diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts new file mode 100644 index 0000000000..4f0ae20bdb --- /dev/null +++ b/arch/arm/dts/qcs404-evb.dts @@ -0,0 +1,81 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm QCS404 based evaluation board device tree source + * + * (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org + */ + +/dts-v1/; + +#include "skeleton64.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/pinctrl-snapdragon.h> +#include <dt-bindings/clock/qcom,gcc-qcs404.h> + +/ { + model = "Qualcomm Technologies, Inc. QCS404 EVB"; + compatible = "qcom,qcs404-evb", "qcom,qcs404"; + #address-cells = <0x2>; + #size-cells = <0x2>; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &debug_uart; + }; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0x40000000>; + }; + + soc { + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges = <0x0 0x0 0x0 0xffffffff>; + compatible = "simple-bus"; + + pinctrl_north@1300000 { + compatible = "qcom,tlmm-qcs404"; + reg = <0x1300000 0x200000>; + + blsp1_uart2: uart { + pins = "GPIO_17", "GPIO_18"; + function = "blsp_uart2"; + }; + }; + + gcc: clock-controller@1800000 { + compatible = "qcom,gcc-qcs404"; + reg = <0x1800000 0x80000>; + #address-cells = <0x1>; + #size-cells = <0x0>; + }; + + debug_uart: serial@78b1000 { + compatible = "qcom,msm-uartdm-v1.4"; + reg = <0x78b1000 0x200>; + clock = <&gcc GCC_BLSP1_UART2_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + bit-rate = <0xFF>; + pinctrl-names = "uart"; + pinctrl-0 = <&blsp1_uart2>; + }; + + sdhci@7804000 { + compatible = "qcom,sdhci-msm-v5"; + reg = <0x7804000 0x1000 0x7805000 0x1000>; + clock = <&gcc GCC_SDCC1_APPS_CLK>, + <&gcc GCC_SDCC1_AHB_CLK>; + bus-width = <0x8>; + index = <0x0>; + non-removable; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + }; + }; +}; + +#include "qcs404-evb-uboot.dtsi" diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig index cb53dc8901..0927333306 100644 --- a/arch/arm/mach-snapdragon/Kconfig +++ b/arch/arm/mach-snapdragon/Kconfig @@ -69,11 +69,22 @@ config TARGET_STARQLTECHN select SDM845 select DM_ETH if NET
+config TARGET_QCS404EVB + bool "Qualcomm Technologies, Inc. QCS404 EVB" + select LINUX_KERNEL_IMAGE_HEADER + help + Support for Qualcomm Technologies, Inc. QCS404 evaluation board. + Features: + - Qualcomm Snapdragon QCS404 SoC + - 1GiB RAM + - 8GiB eMMC, uSD slot + endchoice
source "board/qualcomm/dragonboard410c/Kconfig" source "board/qualcomm/dragonboard820c/Kconfig" source "board/qualcomm/dragonboard845c/Kconfig" source "board/samsung/starqltechn/Kconfig" +source "board/qualcomm/qcs404-evb/Kconfig"
endif diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile index cb8c1aa8d2..0d31f10f68 100644 --- a/arch/arm/mach-snapdragon/Makefile +++ b/arch/arm/mach-snapdragon/Makefile @@ -17,3 +17,5 @@ obj-y += pinctrl-apq8016.o obj-y += pinctrl-apq8096.o obj-y += pinctrl-qcs404.o obj-$(CONFIG_SDM845) += pinctrl-sdm845.o +obj-$(CONFIG_TARGET_QCS404EVB) += clock-qcs404.o +obj-$(CONFIG_TARGET_QCS404EVB) += sysmap-qcs404.o diff --git a/arch/arm/mach-snapdragon/sysmap-qcs404.c b/arch/arm/mach-snapdragon/sysmap-qcs404.c new file mode 100644 index 0000000000..b7409031a0 --- /dev/null +++ b/arch/arm/mach-snapdragon/sysmap-qcs404.c @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Qualcomm QCS404 memory map + * + * (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org + */ + +#include <common.h> +#include <asm/armv8/mmu.h> + +static struct mm_region qcs404_mem_map[] = { + { + .virt = 0x0UL, /* Peripheral block */ + .phys = 0x0UL, /* Peripheral block */ + .size = 0x8000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | + PTE_BLOCK_NON_SHARE | + PTE_BLOCK_PXN | PTE_BLOCK_UXN + }, { + .virt = 0x80000000UL, /* DDR */ + .phys = 0x80000000UL, /* DDR */ + .size = 0x40000000UL, + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | + PTE_BLOCK_INNER_SHARE + }, { + /* List terminator */ + 0, + } +}; + +struct mm_region *mem_map = qcs404_mem_map; diff --git a/board/qualcomm/qcs404-evb/Kconfig b/board/qualcomm/qcs404-evb/Kconfig new file mode 100644 index 0000000000..32657c7d5e --- /dev/null +++ b/board/qualcomm/qcs404-evb/Kconfig @@ -0,0 +1,15 @@ +if TARGET_QCS404EVB + +config SYS_BOARD + default "qcs404-evb" + +config SYS_VENDOR + default "qualcomm" + +config SYS_SOC + default "qcs404" + +config SYS_CONFIG_NAME + default "qcs404-evb" + +endif diff --git a/board/qualcomm/qcs404-evb/MAINTAINERS b/board/qualcomm/qcs404-evb/MAINTAINERS new file mode 100644 index 0000000000..0a2e194ff6 --- /dev/null +++ b/board/qualcomm/qcs404-evb/MAINTAINERS @@ -0,0 +1,6 @@ +Qualcomm Technologies, Inc. QCS404 evaluation board +M: Sumit Garg sumit.garg@linaro.org +S: Maintained +F: board/qualcomm/qcs404-evb/ +F: include/configs/qcs404-evb.h +F: configs/qcs404evb_defconfig diff --git a/board/qualcomm/qcs404-evb/Makefile b/board/qualcomm/qcs404-evb/Makefile new file mode 100644 index 0000000000..4665827e08 --- /dev/null +++ b/board/qualcomm/qcs404-evb/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org +# + +obj-y += qcs404-evb.o diff --git a/board/qualcomm/qcs404-evb/qcs404-evb.c b/board/qualcomm/qcs404-evb/qcs404-evb.c new file mode 100644 index 0000000000..f1e6e7f7eb --- /dev/null +++ b/board/qualcomm/qcs404-evb/qcs404-evb.c @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Board init file for QCS404-EVB + * + * (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org + */ + +#include <common.h> +#include <cpu_func.h> +#include <dm.h> +#include <env.h> +#include <init.h> +#include <asm/cache.h> +#include <asm/global_data.h> +#include <fdt_support.h> +#include <asm/arch/dram.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int board_init(void) +{ + return 0; +} + +void reset_cpu(void) +{ + psci_system_reset(); +} diff --git a/board/qualcomm/qcs404-evb/qcs404-evb.its b/board/qualcomm/qcs404-evb/qcs404-evb.its new file mode 100644 index 0000000000..c9822827c9 --- /dev/null +++ b/board/qualcomm/qcs404-evb/qcs404-evb.its @@ -0,0 +1,64 @@ +/* + * U-Boot uImage source file with multiple kernels, ramdisks and FDT blobs + */ + +/dts-v1/; + +/ { + description = "Various kernels, ramdisks and FDT blobs"; + #address-cells = <1>; + + images { + kernel-1 { + description = "5.18.0-rc1"; + data = /incbin/("./qcs404_imgs/Image.gz"); + type = "kernel"; + arch = "arm64"; + os = "linux"; + compression = "gzip"; + load = <0x80000000>; + entry = <0x80000000>; + hash-1 { + algo = "sha1"; + }; + }; + + ramdisk-1 { + description = "Initial ramdisk"; + data = /incbin/("./qcs404_imgs/initramfs-tiny-image-qemuarm64-20220618074058-1169.rootfs.cpio.gz"); + type = "ramdisk"; + arch = "arm64"; + os = "linux"; + compression = "gzip"; + load = <00000000>; + entry = <00000000>; + hash-1 { + algo = "sha1"; + }; + }; + + fdt-1 { + description = "qcs404-evb-fdt"; + data = /incbin/("./qcs404_imgs/qcs404-evb-4000.dtb"); + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x83000000>; + hash-1 { + algo = "sha1"; + }; + }; + + }; + + configurations { + default = "config-1"; + + config-1 { + description = "qcs404-evb kernel-5.18.0-rc1 configuration"; + kernel = "kernel-1"; + ramdisk = "ramdisk-1"; + fdt = "fdt-1"; + }; + }; +}; diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig new file mode 100644 index 0000000000..7c76e8353e --- /dev/null +++ b/configs/qcs404evb_defconfig @@ -0,0 +1,39 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=19000000 +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_SNAPDRAGON=y +CONFIG_DEFAULT_DEVICE_TREE="qcs404-evb" +CONFIG_TARGET_QCS404EVB=y +CONFIG_IDENT_STRING="\nQualcomm QCS404-EVB" +CONFIG_SYS_TEXT_BASE=0x0 +CONFIG_SYS_LOAD_ADDR=0x80000000 +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_BOOTDELAY=5 +CONFIG_SAVE_PREV_BL_FDT_ADDR=y +CONFIG_SAVE_PREV_BL_INITRAMFS_START_ADDR=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_HUSH_PARSER=y +CONFIG_CMD_BMP=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPT=y +CONFIG_CMD_PART=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_NET is not set +CONFIG_CLK=y +CONFIG_PINCTRL=y +CONFIG_DM_MMC=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ADMA=y +CONFIG_MMC_SDHCI_MSM=y +CONFIG_MMC_HS400_SUPPORT=y +CONFIG_MSM_SERIAL=y +CONFIG_LMB_MAX_REGIONS=64 +CONFIG_USE_BOOTARGS=y +CONFIG_BOOTARGS="earlycon ignore_loglevel root= clk_ignore_unused" diff --git a/doc/board/qualcomm/index.rst b/doc/board/qualcomm/index.rst index 10b98214e9..0f9c429956 100644 --- a/doc/board/qualcomm/index.rst +++ b/doc/board/qualcomm/index.rst @@ -8,3 +8,4 @@ Qualcomm
dragonboard410c sdm845 + qcs404 diff --git a/doc/board/qualcomm/qcs404.rst b/doc/board/qualcomm/qcs404.rst new file mode 100644 index 0000000000..bbb40b043b --- /dev/null +++ b/doc/board/qualcomm/qcs404.rst @@ -0,0 +1,79 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. sectionauthor:: Sumit Garg sumit.garg@linaro.org + +QCS404 EVB +========== + +About this +---------- +This document describes the information about Qualcomm QCS404 evaluation board +and it's usage steps. + +U-Boot can be used as a replacement for Qualcomm's original ABL (UEFI) bootloader. +It is loaded as an Android boot image through ABL + +Installation +------------ +Build +^^^^^ +Setup ``CROSS_COMPILE`` for aarch64 and build U-Boot for your board:: + + $ export CROSS_COMPILE=<aarch64 toolchain prefix> + $ make qcs404evb_defconfig + $ make + +This will build ``u-boot.bin`` in the configured output directory. + +Generate FIT image +^^^^^^^^^^^^^^^^^^ +A ``qcs404.its`` file can be found in ``board/qualcomm/qcs404-evb/`` directory. +It expects a folder as ``qcs404_imgs/`` in the main directory containing +pre-built kernel, dts and ramdisk images. See ``qcs404.its`` for full path to +images. + +- Build FIT image:: + + mkimage -f qcs404-evb.its qcs404-evb.itb + +Pack android boot image +^^^^^^^^^^^^^^^^^^^^^^^ +We'll assemble android boot image with ``u-boot.bin`` instead of linux kernel, +and FIT image instead of ``initramfs``. Android bootloader expect gzipped kernel +with appended dtb, so let's mimic linux to satisfy stock bootloader: + +- create dump dtb:: + + workdir=/tmp/prepare_payload + mkdir -p "$workdir" + cd "$workdir" + mock_dtb="$workdir"/payload_mock.dtb + + dtc -I dts -O dtb -o "$mock_dtb" << EOF + /dts-v1/; + / { + model = "Qualcomm Technologies, Inc. QCS404 EVB 4000"; + compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", "qcom,qcs404"; + + #address-cells = <2>; + #size-cells = <2>; + + memory@80000000 { + device_type = "memory"; + /* We expect the bootloader to fill in the size */ + reg = <0 0x80000000 0 0>; + }; + + chosen { }; + }; + EOF + +- gzip u-boot ``gzip u-boot.bin`` +- append dtb to gzipped u-boot: ``cat u-boot.bin.gz "$mock_dtb" > u-boot.bin.gz-dtb`` + +Now we've got everything to build android boot image::: + + mkbootimg --kernel u-boot.bin.gz-dtb \ + --ramdisk qcs404-evb.itb --pagesize 4096 \ + --base 0x80000000 --output boot.img + +Flash image on qcs404-evb using fastboot method. diff --git a/include/configs/qcs404-evb.h b/include/configs/qcs404-evb.h new file mode 100644 index 0000000000..a7f645b613 --- /dev/null +++ b/include/configs/qcs404-evb.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for QCS404 evaluation board + * + * (C) Copyright 2022 Sumit Garg sumit.garg@linaro.org + */ + +#ifndef __CONFIGS_QCS404EVB_H +#define __CONFIGS_QCS404EVB_H + +#include <linux/sizes.h> +#include <asm/arch/sysmap-qcs404.h> + +#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 230400, 460800, 921600 } + +#define CONFIG_EXTRA_ENV_SETTINGS \ + "bootm_size=0x5000000\0" \ + "bootm_low=0x80000000\0" \ + "bootcmd=bootm $prevbl_initrd_start_addr\0" + +#define CONFIG_SYS_BOOTM_LEN SZ_64M + +/* Monitor Command Prompt */ +#define CONFIG_SYS_CBSIZE 512 +#define CONFIG_SYS_MAXARGS 64 + +#endif